Abstract: A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascade arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.

Abstract: A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascade arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.

Abstract: A front end and a high frequency receiver provided therewith are described, which front end comprises a quadrature low noise amplifier as a low noise amplifier. A high isolation between local oscillators and quadrature mixers is achieved thereby, reducing a DC offset at mixer outputs. The quadrature low noise amplifier may be implemented as a differential class AB cascode arrangement of MOST or FET semiconductors. A low distortion receiver having a high linearity is the result.

Abstract: A combination of a microphone and a sigma-delta A/D converter include at least one feedback loop, such as a DC feedback loop. The DC feedback loop provides the bias current for a junction FET of the microphone. In this way, the signal current from the FET can be injected directly into the input integrator of the sigma-delta A/D converter without the need of signal resistors in series with the FET.

Abstract: The A/D convener has a digital output for outputting a digital output signal selected from a set of three or more available values. A feedback loop generates the digital output signal so that a time averaged difference between an analog input signal and an analog feedback signal representative of the digital output signal is minimized. A feedback signal generator generates successive signal levels of the feedback signal. A return to zero switch inserts predetermined return to zero levels between the signal levels in the feedback signal. The return to zero switch is also used to provide the signal level for one of the available values.

Abstract: A quadrature device 1 for a communication device, receiver, transmitter, transceiver, telephone, mixer, modulator or demodulator comprises I and Q signal paths and corresponding signal paths components 2I, 2Q; 4I, 4Q; 9I, 9Q showing a mismatch. The device 1 comprises switching circuitry 3, 3?, 6, 3?, 3?? for data dependently exchanging the I and Q signals in the I and Q paths in order to improve adverse effects, such as reduction of leakage of quantisation noise from the image band to the signal band in a quadrature modulator. Even mismatch effects between digital to analog converters (DAC's) in a feedback path of a sigma delta (??) modulator are compensated.

Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304).

Abstract: A filter (3) is described, which filter is provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M1-32; M′1-32) having a source (S) and a drain (D). The source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another. The filter acting as an impedance transformer is a passive low power consuming and tunable filter, such as for a radio frequency (RF) receiver. It occupies only a very small area, while integrated on chip.

Abstract: The invention relates to a method for modulating an output voltage of a transmitter circuit comprising a voltage controlled oscillator, a digital/analog converter and an antenna circuit, the method comprising the method comprising sending an output signal of sufficient power from the voltage controlled oscillator directly to the antenna circuit and directly modulating a frequency of the output signal of the voltage controlled oscillator. The invention furthermore relates to a transmitter circuit comprising a voltage controlled oscillator having a tank circuit, a digital/analog converter and an antenna circuit, wherein the voltage controlled oscillator is adapted to send an output signal of sufficient power directly to the antenna circuit and wherein the digital/analog converter is arranged to modulate an output frequency of the voltage controlled oscillator.

Abstract: An A/B class output stage of a signal treating circuit, such as for example a mobile telephone, a radio car kit, other portable equipment, etc. treats a signal. The A/B class output stage drives a load with the signal as treated by the signal treating circuit. The output stage can be connected to one of more than one supply voltages as a function of a voltage value of the signal. The signal treating circuit comprises a D/A converter circuit and a non-linear operating circuit between an input of the signal treating circuit and the D/A converter. Above a certain signal value a change in supply voltage is made. Distortions in an output signal resulting from such a change are prevented by having the non-linear operating circuit generate a jump in DC level at an output of the output stage or raise a value of the signal at a non-clipping one of two output terminals with an extra amount that compensates for the clipping at a clipping one of the two output terminals.

Abstract: A device according to the invention for writing information to an information carrier (1) includes conversion means (7) for converting symbols in an information signal (SINFO) into pulse sequences in a control signal (STR). The device further includes a transducer (10) for generating a physically detectable pattern on the information carrier (1) in response to the control signal (STR). The conversion means (7) include assignment means (702) for assigning properties of the pulse sequences to symbols in the information signal (SINFO). These properties include the duration and the magnitude of pulses in the pulse sequence. The conversion means (7) further include at least one counter (711) for supplying a count signal (TC1) after a time interval, which counter is coupled to the assignment means (702). The conversion means (7) further include a controllable delay line (761) coupled to the at least one counter (711), for delaying the count signal (TC1), and to the assignment means (702).

Abstract: A digital to analog converter (DAC) for converting a digital signal (DS) having a maximum voltage range which corresponds to a first supply voltage (UL) into an analog signal (Uout) having a maximum voltage range which corresponds to a second supply voltage (UH). The first supply voltage (UL) is offered between a first supply terminal (VSS) and a second supply terminal (VDDL). The second supply voltage (UH) is offered between the first supply terminal (VSS) and a third supply terminal (VDDH). The digital to analog converter (DAC) comprises conversion resistors (RCNV0-RCNVn) and coupling means (CPL) for coupling a number of said conversion resistors (RCNV2-RCNVn) in between the first supply terminal (VSS) and an output terminal (OUT), and for coupling the remainder of said conversion resistors (RCNV0-RCNV1) in between the third supply terminal (VDDH) and the output terminal (OUT). The value of said number depends on the data content of the digital signal (DS).

Abstract: A track and hold amplifier for use in analog/digital-converters comprises, in succession, an input buffer, a pn-junction switch and hold a capacitor. A feedback is provided between the hold capacitor and the input buffer and a second pn-junction switch is provided to disable the feedback during the hold mode.

Abstract: The invention relates to a method for modulating an output voltage of a transmitter circuit comprising a voltage controlled oscillator, a digital/analog converter and an antenna circuit, the method comprising the method comprising sending an output signal of sufficient power from the voltage controlled oscillator directly to the antenna circuit and directly modulating a frequency of the output signal of the voltage controlled oscillator. The invention furthermore relates to a transmitter circuit comprising a voltage controlled oscillator having a tank circuit, a digital/analog converter and an antenna circuit, wherein the voltage controlled oscillator is adapted to send an output signal of sufficient power directly to the antenna circuit and wherein the digital/analog converter is arranged to modulate an output frequency of the voltage controlled oscillator.

Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit modules, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103), the first circuit module (100) being coupled with the second circuit module (100′) and the second circuit module (100′) being cross coupled with the first circuit module (100), each of the circuit modules (100 and 100′) comprising a first and a second Voltage Controlled Current Source (101) (VCCS).

Abstract: A front end and a high frequency receiver (1) provided therewith are described, which front end comprises a quadrature low noise amplifier (2-1, 2-2) as a low noise amplifier. A high isolation between local oscillators (6-1, 6-2) and quadrature mixers (3-1, 3-2) is achieved thereby, reducing a DC offset at mixer outputs (7, 8). The quadrature low noise amplifier may be implemented as a differential class AB cascode arrangement of MOST or FET semiconductors (15). A low distortion receiver (1) having a high linearity is the result.

Abstract: A filter (3) is described, which filter is provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M1-32; M′1-32) having a source (S) and a drain (D). The source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another. The filter acting as an impedance transformer is a passive low power consuming and tunable filter, such as for a radio frequency (RF) receiver. It occupies only a very small area, while integrated on chip.

Abstract: A combination of an electret microphone (1) and a sigma-delta A/D converter (9, 5, 7, 8). The sigma-delta A/D converter has a DC feedback loop (8) which provides the bias current (IDC) for the junction FET (2) of the electret microphone. In this way the signal current from the FET (2) can be injected directly into the input integrator (9) of the sigma-delta A/D converter without the need of signal resistors in series with the FET (2).

Abstract: A quadrature device 1 for a communication device, receiver, transmitter, transceiver, telephone, mixer, modulator or demodulator comprises I and Q signal paths and corresponding signal paths components 2I, 2Q; 4I, 4Q; 9I, 9Q showing a mismatch. The device 1 comprises switching means 3, 3′, 6, 3″, 3′″ for in particular data dependently exchanging the I and Q signals in said I and Q paths in order to improve adverse effects, such as reduction of leakage of quantisation noise from the image band to the signal band in a quadrature modulator. Even mismatch effects between digital to analog converters (DAC's) in a feedback path of a sigma delta (&Sgr;&Dgr;) modulator are compensated.

Abstract: A digital to analog converter (DAC) for converting a digital signal (DS) having a maximum voltage range which corresponds to a first supply voltage (UL) into an analog signal (UOUT) having a maximum voltage range which corresponds to a second supply voltage (UH). The first supply voltage (UL) is offered between a first supply terminal t(VSS) and a second supply terminal (VDDL). The second supply voltage (UH) is offered between the first supply terminal (VSS) and a third supply terminal (VDDH). The digital to analog converter (DAC) comprises conversion resistors (RCNV0-RCNVn) and coupling means (CPL) for coupling a number of said conversion resistors (RCNV2-RCNVn) in between the first supply terminal (VSS) and an output terminal (OUT), and for coupling the remainder of said conversion resistors (RCNV0-RCNV1) in between the third supply terminal (VDDH) and the output terminal (OUT). The value of said number depends on the data content of the digital signal (DS).