Abstract: A facility protection cover is disposed on a concrete foundation and covers a facility device disposed between the facility protection cover and the concrete foundation. The facility protection cover includes a cover body including a fiber-reinforced cement composite. The cover body includes two legs that are spaced apart from each other so as to be located on opposite sides of a facility device placement space. The facility device placement space accommodates the facility device. The cover body includes a bridging portion that bridges the two legs so as to extend over the facility device placement space. The cover body transmits a weight of a vehicle loaded on the cover body to the concrete foundation via the two legs, and restricts a separating relative movement of the two legs along a placement surface of the concrete foundation when the weight of the vehicle is loaded on the bridging portion.

Abstract: According to the present invention, there is provided a semiconductor device having: a switching element serially connected to a resistive element to be measured; a plurality of transistors respectively connected in parallel to a series circuit consisting of the resistive element to be measured and the switching element, which will respectively take desired resistance values when turned on; and a measurement section which measures a resistance value of a parasitic resistance which occurs so as to be coupled to the resistive element to be measured by turning off the switching element and then controlling switching operations of the plurality of transistors to change the resistance values of resistors formed by the plurality of transistors, and subsequently measures a resistance value of the resistive element to be measured based on a resistance value of the parasitic resistance by turning on the switching element while turning off the plurality of transistors.

Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t

Abstract: A semiconductor integrated circuit structure includes a semiconductor substrate; an electronic element disposed in the substrate; a first electrically insulating layer disposed on the substrate and the electronic element; a first electrically conducting interconnection layer electrically connected to the electronic element and disposed at least partly on the first electrically insulating layer; a second electrically insulating layer disposed on the first electrically conducting interconnection layer; a second electrically conducting interconnection layer disposed on the second electrically insulating layer; and a through-hole penetrating the second electrically insulating layer to the first electrically conducting interconnection layer, part of the second interconnection layer being disposed within the through-hole and contacting the first electrically conducting interconnection layer wherein the first electrically conducting interconnection layer includes a current barrier including at least one opening in t

Abstract: A single chamber apparatus for chemical vapor deposition of films on semiconductor substrates transported through the chamber. Heaters and a plurality of gas dispersing heads are disposed in the chamber for forming films by chemical vapor deposition. A cooling head is disposed between each adjacent pair of gas dispersing heads for cooling whereby the surface temperature of the substrates opposite the gas dispersing heads is substantially equal to that of the substrates located opposite the cooling heads.

Abstract: An improved interconnection structure and method for forming the interconnection in a semiconductor device having multilayered interconnection structure in which a contact hole for electrically connecting a first layer interconnection to a predetermined region of a semiconductor substrate and a through hole for electrically connecting a second layer interconnection to the first layer interconnection are formed in the regions overlapping with each other in planer layout. In the interconnection structure of the present invention, hillocks effective to compensate for the contact hole step are formed in the first layer interconnection only in the region of the contact hole of the first layer interconnection.

Abstract: The rough ground rear surface 13b of a semiconductor wafer 11 is mirror-polished by localized irradiation with a focused laser beam 21. The wafer is moved relative to the beam, and the melt puddle formed by the beam thereafter recrystallizes at its trailing edge 24 to leave a mirror smooth rear surface 13c.