Abstract: A clamp circuit in which, so long as the input voltage ranges between preselected voltages +E and -E, the output voltage tracks the input voltage. When the input voltage goes beyond +E or -E, the output voltage is clamped to +E or -E. When, thereafter, the input voltage is changed in the opposite sense by X volts, where .vertline.X.vertline..ltoreq. 2E below its maximum value the output voltage changes by X volts.The clamping circuit utilizes a differential amplifier and circuits providing two feedback paths between the output and inverting input of the amplifier, one or the other being operable dependent on the value of input signal to provide the clamping action described above.

Abstract: An FET oscillator includes means for controlling the gain of the oscillator to control its output level to thereby avoid limiting, and thus to reduce distortion of the oscillator output. A feedback loop is serially connected between the drain and gate electrodes to cause the gate direct voltage to increase negatively as drain output amplitude increases and thus reduce drain current and stabilize oscillator gain. The level of oscillation is adjustable by a potentiometer connection to the gate.