Patents by Inventor Elmar Wisotzki
Elmar Wisotzki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11545479Abstract: A semiconductor device module. The semiconductor device module may include a first substrate; and a semiconductor die assembly, disposed on the first substrate. The semiconductor die assembly may include a first semiconductor die, bonded to the first substrate; a second semiconductor die, disposed over the first semiconductor die; and an electrical connector, disposed between the first semiconductor die and the second semiconductor die, wherein the semiconductor die assembly comprises an insulated gate bipolar transistor (IGBT) die and a freewheeling diode die.Type: GrantFiled: May 10, 2021Date of Patent: January 3, 2023Assignee: Littelfuse, Inc.Inventor: Elmar Wisotzki
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Publication number: 20210265332Abstract: A semiconductor device module. The semiconductor device module may include a first substrate; and a semiconductor die assembly, disposed on the first substrate. The semiconductor die assembly may include a first semiconductor die, bonded to the first substrate; a second semiconductor die, disposed over the first semiconductor die; and an electrical connector, disposed between the first semiconductor die and the second semiconductor die, wherein the semiconductor die assembly comprises an insulated gate bipolar transistor (IGBT) die and a freewheeling diode die.Type: ApplicationFiled: May 10, 2021Publication date: August 26, 2021Applicant: Littelfuse, Inc.Inventor: Elmar Wisotzki
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Publication number: 20210183841Abstract: A semiconductor device module. The semiconductor device module may include a first substrate; and a semiconductor die assembly, disposed on the first substrate. The semiconductor die assembly may include a first semiconductor die, bonded to the first substrate; a second semiconductor die, disposed over the first semiconductor die; and an electrical connector, disposed between the first semiconductor die and the second semiconductor die, wherein the semiconductor die assembly comprises an insulated gate bipolar transistor (IGBT) die and a freewheeling diode die.Type: ApplicationFiled: December 11, 2019Publication date: June 17, 2021Applicant: Littelfuse, Inc.Inventor: Elmar Wisotzki
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Patent number: 11037917Abstract: A semiconductor device module. The semiconductor device module may include a first substrate; and a semiconductor die assembly, disposed on the first substrate. The semiconductor die assembly may include a first semiconductor die, bonded to the first substrate; a second semiconductor die, disposed over the first semiconductor die; and an electrical connector, disposed between the first semiconductor die and the second semiconductor die, wherein the semiconductor die assembly comprises an insulated gate bipolar transistor (IGBT) die and a freewheeling diode die.Type: GrantFiled: December 11, 2019Date of Patent: June 15, 2021Assignee: Littelfuse, Inc.Inventor: Elmar Wisotzki
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Patent number: 10854581Abstract: A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.Type: GrantFiled: May 8, 2020Date of Patent: December 1, 2020Assignee: Littelfuse, Inc.Inventors: Elmar Wisotzki, Frank Ettingshausen
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Patent number: 10847658Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: GrantFiled: May 26, 2020Date of Patent: November 24, 2020Assignee: Littelfuse, Inc.Inventor: Elmar Wisotzki
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Publication number: 20200287058Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Applicant: IXYS, LLCInventor: Elmar Wisotzki
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Publication number: 20200266174Abstract: A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.Type: ApplicationFiled: May 8, 2020Publication date: August 20, 2020Applicant: LITTELFUSE, INC.Inventors: Elmar Wisotzki, Frank Ettingshausen
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Patent number: 10734362Abstract: A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.Type: GrantFiled: June 11, 2017Date of Patent: August 4, 2020Assignee: Littelfuse, Inc.Inventors: Elmar Wisotzki, Frank Ettingshausen
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Patent number: 10714635Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: GrantFiled: December 4, 2018Date of Patent: July 14, 2020Assignee: Littlfuse, Inc.Inventor: Elmar Wisotzki
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Publication number: 20190115480Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: ApplicationFiled: December 4, 2018Publication date: April 18, 2019Applicant: IXYS, LLCInventor: Elmar Wisotzki
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Patent number: 10193000Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: GrantFiled: July 31, 2017Date of Patent: January 29, 2019Assignee: IXYS, LLCInventor: Elmar Wisotzki
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Patent number: 10164124Abstract: An inverse diode die has a high reverse breakdown voltage, a short reverse recovery time Trr, and is rugged in terms of reverse breakdown voltage stability over long term use in hard commutation applications. The die has an unusually lightly doped bottomside P type anode region and also has an N? type drift region above it. Both regions are of bulk wafer material. An N+ type contact region extends down into the drift region. A topside metal electrode is on the contact region. A P type silicon peripheral sidewall region laterally rings around the drift region. A topside passivation layer rings around the topside electrode. A bottomside metal electrode is on the bottom of the die. The die has a deep layer of hydrogen ions that extends through the N? drift region. The die also has a shallow layer of ions. Both ion layers are implanted from the bottomside.Type: GrantFiled: July 31, 2017Date of Patent: December 25, 2018Assignee: IXYS, LLCInventor: Elmar Wisotzki
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Patent number: 9941256Abstract: A packaged inverse diode device exhibits superior commutation robustness. The device includes a stack of inverse diodes disposed within a housing. Each adjacent pair of inverse diodes is bonded together by an intervening DMB (Direct Metal Bonded) substrate structure. At one end of the stack of diode dice and DMB substrate structures is attached a first metal terminal. A second metal terminal is attached to the other end of the stack. The two terminals serve as package terminals of the overall device. In a novel method, the device undergoes severe commutation. A large forward current is made to flow through the diode stack, followed by a rapid reversal of the voltage across the stack to a large reverse polarity voltage. Despite a substantial rate of change of the commutation current at the onset of the reverse voltage condition, the inverse diode device is not damaged.Type: GrantFiled: December 21, 2016Date of Patent: April 10, 2018Assignee: IXYS CorporationInventors: Frank Ettingshausen, Thomas Spann, Elmar Wisotzki
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Patent number: 9922864Abstract: A manufacturable and economically viable edge termination structure allows a semiconductor device to withstand a very high reverse blocking voltage (for example, 8500 volts) without suffering breakdown. A P type peripheral aluminum diffusion region extends around the bottom periphery of a thick die. The peripheral aluminum diffusion region extends upward from the bottom surface of the die, extending into N- type bulk silicon. A deep peripheral trench extends around the upper periphery of the die. The deep trench extends from the topside of the die down toward the peripheral aluminum diffusion region. A P type sidewall doped region extends laterally inward from the inner sidewall of the trench, and extends laterally outward from the outer sidewall of the trench. The P type sidewall doped region joins with the P type peripheral aluminum diffusion region, thereby forming a separation edge diffusion structure that surrounds the active area of the die.Type: GrantFiled: March 7, 2017Date of Patent: March 20, 2018Assignee: IXYS CorporationInventors: Elmar Wisotzki, Christoph Koerber
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Publication number: 20170278828Abstract: A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.Type: ApplicationFiled: June 11, 2017Publication date: September 28, 2017Inventors: Elmar Wisotzki, Frank Ettingshausen
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Patent number: 9704832Abstract: A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.Type: GrantFiled: February 29, 2016Date of Patent: July 11, 2017Assignee: IXYS CorporationInventors: Elmar Wisotzki, Frank Ettingshausen
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Publication number: 20170178947Abstract: A manufacturable and economically viable edge termination structure allows a semiconductor device to withstand a very high reverse blocking voltage (for example, 8500 volts) without suffering breakdown. A P type peripheral aluminum diffusion region extends around the bottom periphery of a thick die. The peripheral aluminum diffusion region extends upward from the bottom surface of the die, extending into N? type bulk silicon. A deep peripheral trench extends around the upper periphery of the die. The deep trench extends from the topside of the die down toward the peripheral aluminum diffusion region. A P type sidewall doped region extends laterally inward from the inner sidewall of the trench, and extends laterally outward from the outer sidewall of the trench. The P type sidewall doped region joins with the P type peripheral aluminum diffusion region, thereby forming a separation edge diffusion structure that surrounds the active area of the die.Type: ApplicationFiled: March 7, 2017Publication date: June 22, 2017Inventors: Elmar Wisotzki, Christoph Koerber
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Patent number: 9590033Abstract: A manufacturable and economically viable edge termination structure allows a semiconductor device to withstand a very high reverse blocking voltage (for example, 8500 volts) without suffering breakdown. A P type peripheral aluminum diffusion region extends around the bottom periphery of a thick die. The peripheral aluminum diffusion region extends upward from the bottom surface of the die, extending into N? type bulk silicon. A deep peripheral trench extends around the upper periphery of the die. The deep trench extends from the topside of the die down toward the peripheral aluminum diffusion region. A P type sidewall doped region extends laterally inward from the inner sidewall of the trench, and extends laterally outward from the outer sidewall of the trench. The P type sidewall doped region joins with the P type peripheral aluminum diffusion region, thereby forming a separation edge diffusion structure that surrounds the active area of the die.Type: GrantFiled: November 20, 2015Date of Patent: March 7, 2017Assignee: IXYS CorporationInventors: Elmar Wisotzki, Christoph Koerber
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Patent number: 8716067Abstract: A recess is formed into a first side of a wafer such that a thinned center portion of the wafer is formed, and such that the central portion is surrounded by a thicker peripheral edge support portion. The second side of the wafer remains substantially entirely planar. After formation of the thinned wafer, vertical power devices are formed into the first side of the central portion of the wafer. Formation of the devices involves forming a plurality of diffusion regions into the first side of the thinned central portion. Metal electrodes are formed on the first and second sides, the peripheral portion is cut from the wafer, and the thin central portion is diced to form separate power devices. In one example, a first commercial entity manufactures the thinned wafers, and a second commercial entity obtains the thinned wafers and performs subsequent processing to form the vertical power devices.Type: GrantFiled: February 20, 2012Date of Patent: May 6, 2014Assignee: IXYS CorporationInventors: Elmar Wisotzki, Peter Ingram