Abstract: Recovery circuitry for passively recovering charge from capacitances at electrodes in an Implantable Pulse Generator (IPG) is disclosed. The passive recovery circuitry includes passive recovery switches intervening between each electrode node and a common reference voltage, and each switch is in series with a variable resistance that may be selected based on differing use models of the IPG. The passive recovery switches may also be controlled in different modes. For example, in a first mode, the only recovery switches closed after a stimulation pulse are those associated with electrodes used to provide stimulation. In a second mode, all recovery switches are closed after a stimulation pulse, regardless of the electrodes used to provide stimulation. In a third mode, all recovery switches are closed continuously, which can provide protection when the IPG is in certain environments (e.g., MRI), and which can also be used during stimulation therapy itself.

Abstract: An architecture is disclosed for an Implantable Pulse Generator having improved compliance voltage monitoring and adjustment software and hardware. Software specifies which stimulation pulses are to be measured as relevant to monitoring and adjusting the compliance voltage. Preferably, specifying such pulses occurs by setting a compliance monitoring instruction (e.g., a bit) in the program that defines the pulse, and the compliance monitor bit instruction may be set at a memory location defining a particular pulse phase during which the compliance voltage should be monitored. When a compliance monitor instruction issues, the active electrode node voltages are monitored and compared to desired ranges to determine whether they are high or low. Compliance logic operates on these high/low signals and processes them to decide whether to issue a compliance voltage interrupt to the microcontroller, which can then command the compliance voltage generator to increase or decrease the compliance voltage.

Abstract: Disclosed herein are circuits and methods for a multi-electrode implantable stimulator device incorporating one decoupling capacitor in the current path established via at least one cathode electrode and at least one anode electrode. In one embodiment, the decoupling capacitor may be hard-wired to a dedicated anode on the device. The cathodes are selectively activatable via stimulation switches. In another embodiment, any of the electrodes on the devices can be selectively activatable as an anode or cathode. In this embodiment, the decoupling capacitor is placed into the current path via selectable anode and cathode stimulation switches. Regardless of the implementation, the techniques allow for the benefits of capacitive decoupling without the need to associate decoupling capacitors with every electrode on the multi-electrode device, which saves space in the body of the device.

Abstract: An implantable pulse generator (IPG) for an implantable medical device is disclosed herein. The IPG is capable of sensing the presence of an external magnetic field, such as a magnetic field associated with magnetic resonance imaging (MRI). The IPG includes a circuit that contains a magnetic core inductor and that is configured to boost a first voltage to a second voltage and use the second voltage to drive a current through a load. In a strong magnetic field, the magnetic core of the inductor becomes magnetically saturated, causing the inductance of the inductor to sharply drop. The inductance drop can be detected, for example, by detecting an increase in the second voltage. The circuit may be a boost converter circuit used to provide a compliance voltage for operation of the IPG.

Abstract: An architecture is disclosed for an Implantable Pulse Generator having improved compliance voltage monitoring and adjustment software and hardware. Software specifies which stimulation pulses are to be measured as relevant to monitoring and adjusting the compliance voltage. Preferably, specifying such pulses occurs by setting a compliance monitoring instruction (e.g., a bit) in the program that defines the pulse, and the compliance monitor bit instruction may be set at a memory location defining a particular pulse phase during which the compliance voltage should be monitored. When a compliance monitor instruction issues, the active electrode node voltages are monitored and compared to desired ranges to determine whether they are high or low. Compliance logic operates on these high/low signals and processes them to decide whether to issue a compliance voltage interrupt to the microcontroller, which can then command the compliance voltage generator to increase or decrease the compliance voltage.

Abstract: Disclosed herein are circuits and methods for a multi-electrode implantable stimulator device incorporating one decoupling capacitor in the current path established via at least one cathode electrode and at least one anode electrode. In one embodiment, the decoupling capacitor may be hard-wired to a dedicated anode on the device. The cathodes are selectively activatable via stimulation switches. In another embodiment, any of the electrodes on the devices can be selectively activatable as an anode or cathode. In this embodiment, the decoupling capacitor is placed into the current path via selectable anode and cathode stimulation switches. Regardless of the implementation, the techniques allow for the benefits of capacitive decoupling without the need to associate decoupling capacitors with every electrode on the multi-electrode device, which saves space in the body of the device.

Abstract: A new architecture is disclosed for an IPG having a master and slave electrode driver integrated circuits (ICs). The electrode outputs on the ICs are wired together. Each IC can be programmed to provide pulses with different frequencies. Active timing channels in master and slave ICs are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other IC so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Disclosed is a new architecture for an IPG having a master and slave electrode driver integrated circuits. The electrode outputs on the integrated circuits are wired together. Each integrated circuit can be programmed to provide pulses with different frequencies. Active timing channels in each of the master and slave integrated circuits are programmed to provide the desired pulses, while shadow timing channels in the master and slave are programmed with the timing data from the active timing channels in the other integrated circuit so that each chip knows when the other is providing a pulse, so that each chip can disable its recovery circuitry so as not to defeat those pulses. In the event of pulse overlap at a given electrode, the currents provided by each chip will add at the affected electrode. Compliance voltage generation is dictated by an algorithm to find an optimal compliance voltage even during periods when pulses are overlapping.

Abstract: Temperature sensing circuitry for an Implantable Medical Device (IMD) is disclosed that can be integrated into integrated circuitry in the IMD and draws very little power, thus enabling continuous temperature monitoring without undue battery depletion. Temperature sensor and threshold setting circuitry produces analog voltage signals indicative of a sensed temperature and at least one temperature threshold. Such circuitry employs a Ptat current reference stage and additional stages, which stages contains resistances that are set based on the desired temperature threshold(s) and to set the voltage range of the sensed temperature. These analog voltages are received at temperature threshold detection circuitry, which produces digital signal(s) indicating whether the sensed temperature has passed the temperature threshold(s). The digital signal(s) are then provided to digital circuitry in the IMD, where they can be stored as a function of time for later review, or used to immediately to control IMD operation.

Abstract: A method and system of providing therapy to a patient implanted with an array of electrodes is provided. A train of electrical stimulation pulses is conveyed within a stimulation timing channel between a group of the electrodes to stimulate neural tissue, thereby providing continuous therapy to the patient. Electrical parameter is sensed within a sensing timing channel using at least one of the electrodes, wherein the first stimulation timing channel and sensing timing channel are coordinated, such that the electrical parameter is sensed during the conveyance of the pulse train within time slots that do not temporally overlap any active phase of the stimulation pulses.

Abstract: A method and system of providing therapy to a patient implanted with an array of electrodes is provided. A train of electrical stimulation pulses is conveyed within a stimulation timing channel between a group of the electrodes to stimulate neural tissue, thereby providing continuous therapy to the patient. Electrical parameter is sensed within a sensing timing channel using at least one of the electrodes, wherein the first stimulation timing channel and sensing timing channel are coordinated, such that the electrical parameter is sensed during the conveyance of the pulse train within time slots that do not temporally overlap any active phase of the stimulation pulses.

Abstract: Temperature sensing circuitry for an Implantable Medical Device (IMD) is disclosed that can be integrated into integrated circuitry in the IMD and draws very little power, thus enabling continuous temperature monitoring without undue battery depletion. Temperature sensor and threshold setting circuitry produces analog voltage signals indicative of a sensed temperature and at least one temperature threshold. Such circuitry employs a Ptat current reference stage and additional stages, which stages contains resistances that are set based on the desired temperature threshold(s) and to set the voltage range of the sensed temperature. These analog voltages are received at temperature threshold detection circuitry, which produces digital signal(s) indicating whether the sensed temperature has passed the temperature threshold(s). The digital signal(s) are then provided to digital circuitry in the IMD, where they can be stored as a function of time for later review, or used to immediately to control IMD operation.

Abstract: The problem of a potentially high amount of supra-threshold charge passing through the patient's tissue at the end of an Implantable Pulse Generator (IPG) program is addressed by circuitry that periodically dissipates only small amount of the charge stored on capacitances (e.g., DC-blocking capacitors) during a pulsed post-program recovery period. This occurs by periodically activating control signals to turn on passive recovery switches to form a series of discharge pulses each dissipating a sub-threshold amount of charge. Such periodic pulsed dissipation may extend the duration of post-program recovery, but is not likely to be noticeable by the patient when the programming in the IPG changes from a first to a second program. Periodic pulsed dissipation of charge may also be used during a program, such as between stimulation pulses.

Abstract: Electrode voltage monitoring circuitry for an implantable neurostimulator system having a plurality of electrode-driver integrated circuits (ICs) in provided. Electrodes from either or both ICs can be chosen to provide stimulation, and one of the IC acts as the master while the other acts as the slave. Electrodes voltages on the slave IC are routed to the master IC, and thus the master IC can monitor both electrode voltages on the slave as well as electrode voltages on the master. Such voltages can be monitored for a variety of purposes, and in particular use of such voltage is disclosed for determining the resistance between electrodes and to set a compliance voltage for stimulation.

Abstract: Temperature sensing circuitry for an Implantable Medical Device (IMD) is disclosed that can be integrated into integrated circuitry in the IMD and draws very little power, thus enabling continuous temperature monitoring without undue battery depletion. Temperature sensor and threshold setting circuitry produces analog voltage signals indicative of a sensed temperature and at least one temperature threshold. Such circuitry employs a Ptat current reference stage and additional stages, which stages contains resistances that are set based on the desired temperature threshold(s) and to set the voltage range of the sensed temperature. These analog voltages are received at temperature threshold detection circuitry, which produces digital signal(s) indicating whether the sensed temperature has passed the temperature threshold(s). The digital signal(s) are then provided to digital circuitry in the IMD, where they can be stored as a function of time for later review, or used to immediately to control IMD operation.

Abstract: Battery management circuitry for an implantable medical device such as an implantable neurostimulator is described. The circuitry has a T-shape with respect to the battery terminal, with charging circuitry coupled between rectifier circuitry and the battery terminal on one side of the T, and load isolation circuitry coupled between the load and the battery terminal on the other side. The load isolation circuitry can comprise two switches wired in parallel. An undervoltage fault condition opens both switches to isolate the battery terminal from the load to prevent further dissipation of the battery. Other fault conditions will open only one the switches leaving the other closed to allow for reduced power to the load to continue implant operations albeit at safer low-power levels. The battery management circuitry can be fixed in a particular location on an integrated circuit which also includes for example the stimulation circuitry for the electrodes.

Abstract: Recovery circuitry for passively recovering charge from capacitances at electrodes in an Implantable Pulse Generator (IPG) is disclosed. The passive recovery circuitry includes passive recovery switches intervening between each electrode node and a common reference voltage, and each switch is in series with a variable resistance that may be selected based on differing use models of the IPG. The passive recovery switches may also be controlled in different modes. For example, in a first mode, the only recovery switches closed after a stimulation pulse are those associated with electrodes used to provide stimulation. In a second mode, all recovery switches are closed after a stimulation pulse, regardless of the electrodes used to provide stimulation. In a third mode, all recovery switches are closed continuously, which can provide protection when the IPG is in certain environments (e.g., MRI), and which can also be used during stimulation therapy itself.

Abstract: An architecture is disclosed for an Implantable Pulse Generator having improved compliance voltage monitoring and adjustment software and hardware. Software specifies which stimulation pulses are to be measured as relevant to monitoring and adjusting the compliance voltage. Preferably, specifying such pulses occurs by setting a compliance monitoring instruction (e.g., a bit) in the program that defines the pulse, and the compliance monitor bit instruction may be set at a memory location defining a particular pulse phase during which the compliance voltage should be monitored. When a compliance monitor instruction issues, the active electrode node voltages are monitored and compared to desired ranges to determine whether they are high or low. Compliance logic operates on these high/low signals and processes them to decide whether to issue a compliance voltage interrupt to the microcontroller, which can then command the compliance voltage generator to increase or decrease the compliance voltage.

Abstract: Digital-to-analog converter (DAC) circuitry for providing currents at electrodes of an Implantable Pulse Generator (IPG) is disclosed. The DAC circuitry includes at least one PDAC for sourcing current to the electrodes, and at least one NDAC for sinking current from the electrodes. The PDACs are powered with power supplies VH (the compliance voltage) and Vssh in a high power domain, and the NDACs are powered with power supplies Vcc and ground in a low power domain. VH may change during IPG operation, and Vssh preferably also changes with a fixed difference with respect to VH. Digital control signals to the PDACs are formed (and possibly converted into) the high power domain, and transistors used to build the PDACs are biased in the high power domain, and thus may also change with VH. This permits transistors in the PDACs and NDACs to be made from normal low-voltage logic transistors.

Abstract: An implantable pulse generator (IPG) for an implantable medical device is disclosed herein. The IPG is capable of sensing the presence of an external magnetic field, such as a magnetic field associated with magnetic resonance imaging (MRI). The IPG includes a circuit that contains a magnetic core inductor and that is configured to boost a first voltage to a second voltage and use the second voltage to drive a current through a load. In a strong magnetic field, the magnetic core of the inductor becomes magnetically saturated, causing the inductance of the inductor to sharply drop. The inductance drop can be detected, for example, by detecting an increase in the second voltage. The circuit may be a boost converter circuit used to provide a compliance voltage for operation of the IPG.