Abstract: Producing a semiconductor or piezoelectric on-insulator type substrate for RF applications which is provided with a porous layer under the BOX layer and under a layer of polycrystalline semiconductor material.

Abstract: A semiconductor structure for radio frequency applications includes a support substrate made of silicon and comprising a mesoporous layer, a dielectric layer arranged on the mesoporous layer and a superficial layer arranged on the dielectric layer. The mesoporous layer comprises hollow pores, the internal walls of which are mainly lined with oxide. The mesoporous layer has a thickness between 3 and 40 microns and a resistivity greater than 20 kohm.cm over its entire thickness. The support substrate has a resistivity between 0.5 and 4 ohm.cm. The invention also relates to a method for producing such a semiconductor structure.

Abstract: Producing a semiconductor or piezoelectric on-insulator type substrate for RF applications which is provided with a porous layer under the BOX layer and under a layer of polycrystalline semiconductor material.

Abstract: Production of a device for connecting a nano-object to an external electrical system (SEE) including: a first chip provided with conducting areas (8a, 8b) and a first nano-object (50) connected to the conducting areas, the first chip being assembled on a support (70) such that the first nano-object is arranged facing an upper face of the support, the device being further provided with first connection elements (80a, 80b) capable of being connected to the external electrical system and arranged on and in contact with the first conducting areas (8a, 8b), the first connection elements being formed on the side of the upper face of the support (70) and being accessible from the side of the upper face of the support.

Abstract: The present disclosure relates to a method of manufacturing a first electronic circuit including a planar surface, intended to be affixed to a second electronic circuit by a self-assembly method with a hybrid molecular bonding, and first electrically-conductive pads exposed on the surface. The method includes the forming of a peripheral area around the surface including second exposed and raised pads, each at least partly having the same composition as the first pads.

Abstract: Manufacturing of a device to connect at least one nano-object to an external electrical system, comprising a support provided with a semiconducting layer in which the first doped zones are formed at a spacing from each other, an external electrical system being connectable to the first doped zones, each first doped zone (8a, 8b) being in contact with a second doped zone on which a portion of the nano-object is located, the second doped zones being separated from each other and with a thickness less than the thickness of the first doped zones.

Abstract: An electronic device for measuring at least one electrical characteristic of an object, including a supporting base provided with at least two measuring units each including at least two sets of electrodes including electrodes, is provided. The electrodes of the sets of electrodes of the same measuring unit are interdigitated such that each electrode of one of the sets of electrodes of the measuring unit is spaced by an inter-electrode distance from an electrode, of the other of the sets of electrodes of the measuring unit, which is adjacent thereto, the electrodes differ in the features in respect of contact with the object and/or the electrode spacing thereof so as to make a differential current measurement.

Abstract: Manufacturing of a device to connect at least one nano-object to an external electrical system, comprising a support provided with a semiconducting layer (4) in which the first doped zones (8a, 8b) are formed at a spacing from each other, an external electrical system (SEE) being connectable to the first doped zones, each first doped zone (8a, 8b) being in contact with a second doped zone (12a, 12b) on which a portion of the nano-object is located, the second doped zones (12a, 12b) being separated from each other and with a thickness (e2) less than the thickness (e1) of the first doped zones (FIG. 1).

Abstract: A method for producing a closed cavity on a substrate, including: a) forming a cavity surrounded by at least one block on a given face of a substrate, the cavity having an aspect ratio higher than a determined threshold; and b) depositing a closing layer on the at least one block surrounding the cavity, the aspect ratio of the cavity being such that in b), the closing layer does not entirely fill the cavity and an empty space in the cavity is maintained.

Abstract: Production of a device for connecting a nano-object to an external electrical system (SEE) including: a first chip provided with conducting areas (8a, 8b) and a first nano-object (50) connected to the conducting areas, the first chip being assembled on a support (70) such that the first nano-object is arranged facing an upper face of the support, the device being further provided with first connection elements (80a, 80b) capable of being connected to the external electrical system and arranged on and in contact with the first conducting areas (8a, 8b), the first connection elements being formed on the side of the upper face of the support (70) and being accessible from the side of the upper face of the support.

Abstract: An electronic device for measuring at least one electrical characteristic of an object, including a supporting base provided with at least two measuring units each including at least two sets of electrodes including electrodes, is provided. The electrodes of the sets of electrodes of the same measuring unit are interdigitated such that each electrode of one of the sets of electrodes of the measuring unit is spaced by an inter-electrode distance from an electrode, of the other of the sets of electrodes of the measuring unit, which is adjacent thereto, the electrodes differ in the features in respect of contact with the object and/or the electrode spacing thereof so as to make a differential current measurement.

Abstract: A bolometric detector includes a substrate; bolometric detection microbridges suspended above the substrate and thermally insulated from the substrate; bolometric compensation microbridges suspended above the substrate and thermalized to the substrate; and a read circuit formed in the substrate to apply a biasing to the detection microbridges and to the compensation microbridges and to form differences between signals generated by detection microbridges and signals generated by compensation microbridges under the effect of the applied biasing. Each detection microbridge and each compensation microbridge includes electrically-conductive anchoring nails connected to the read circuit, a membrane attached to the anchoring nails above the substrate, and a thermometric element arranged in the membrane. The detector further includes thermal short-circuit elements between the membrane of each compensation microbridge and the substrate.

Abstract: A bolometric detector includes a substrate; bolometric detection microbridges suspended above the substrate and thermally insulated from the substrate; bolometric compensation microbridges suspended above the substrate and thermalized to the substrate; and a read circuit formed in the substrate to apply a biasing to the detection microbridges and to the compensation microbridges and to form differences between signals generated by detection microbridges and signals generated by compensation microbridges under the effect of the applied biasing. Each detection microbridge and each compensation microbridge includes electrically-conductive anchoring nails connected to the read circuit, a membrane attached to the anchoring nails above the substrate, and a thermometric element arranged in the membrane. The detector further includes thermal short-circuit elements between the membrane of each compensation microbridge and the substrate.

Abstract: A method for metallization of a semiconductor device. This method includes a) metallizing a set of collection fingers with a low-temperature serigraphy paste on at least a front surface of the semiconductor device, b) sintering, at a temperature below a temperature that would damage the semiconductor device, the serigraphy paste forming the set of metallized collection fingers, by performing a pressing operation on the collection fingers with a press, and c) metallizing at least one collection bus on the set of metallized collection fingers, electrically connecting the collection fingers to one another, with a low-temperature serigraphy paste.

Abstract: A method of forming contacts between at least one metallic layer and at least one semiconductor substrate through at least one layer of dielectric in a semiconductor device. The semiconductor device includes, on at least one base face of the semiconductor substrate, the dielectric layer. The metallic layer is stacked on the dielectric layer. The heated ends of plural protruding elements assembled on a support are brought into contact with the metallic layer simultaneously, thereby creating zones of melted metal under the heated ends of the protruding elements. The melted metal traverses the dielectric and amalgamates with the semiconductor of the substrate at the level of the zones of melted metal, thereby creating the contacts.

Abstract: A method of forming contacts between at least one metallic layer and at least one semiconductor substrate through at least one layer of dielectric in a semiconductor device. The semiconductor device includes, on at least one base face of the semiconductor substrate, the dielectric layer. The metallic layer is stacked on the dielectric layer. The heated ends of plural protruding elements assembled on a support are brought into contact with the metallic layer simultaneously, thereby creating zones of melted metal under the heated ends of the protruding elements. The melted metal traverses the dielectric and amalgamates with the semiconductor of the substrate at the level of the zones of melted metal, thereby creating the contacts.

Abstract: A method for metallization of a semiconductor device. This method includes a) metallizing a set of collection fingers with a low-temperature serigraphy paste on at least a front surface of the semiconductor device, b) sintering, at a temperature below a temperature that would damage the semiconductor device, the serigraphy paste forming the set of metallized collection fingers, by performing a pressing operation on the collection fingers with a press, and c) metallizing at least one collection bus on the set of metallized collection fingers, electrically connecting the collection fingers to one another, with a low-temperature serigraphy paste.