Patents by Inventor Engin Ibrahim Pehlivanoglu
Engin Ibrahim Pehlivanoglu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240114794Abstract: Devices and methods related to stack assembly. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.Type: ApplicationFiled: October 10, 2023Publication date: April 4, 2024Inventors: Hardik Bhupendra MODI, Adarsh Karan JAISWAL, Anil K. AGARWAL, Engin Ibrahim PEHLIVANOGLU
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Patent number: 11785853Abstract: Stack assembly for radio-frequency applications. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.Type: GrantFiled: June 13, 2021Date of Patent: October 10, 2023Assignee: Skyworks Solutions, Inc.Inventors: Hardik Bhupendra Modi, Adarsh Karan Jaiswal, Anil K. Agarwal, Engin Ibrahim Pehlivanoglu
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Publication number: 20230280372Abstract: A probe card for testing or trimming or programming a semiconductor wafer including a first die including a first integrated circuit having a trimmable or programmable component. The probe card including at least one probe arranged to make electrical contact with at least one probe pad arranged on the wafer. The at least one probe pad being electrically connected to the trimmable or programmable component and being arranged in a saw street of the wafer.Type: ApplicationFiled: February 2, 2023Publication date: September 7, 2023Inventors: Guillaume Alexandre Blin, Engin Ibrahim Pehlivanoglu
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Publication number: 20230282529Abstract: A semiconductor wafer comprising a first die including a first integrated circuit having a trimmable or programmable component. The trimmable or programmable component is configured to be trimmed or permanently altered in response to an electrical signal. The semiconductor wafer also includes a saw street arranged adjacent to the first die, and at least one probe pad electrically connected to the trimmable or programmable component. The at least one probe pad is arranged in the saw street.Type: ApplicationFiled: February 2, 2023Publication date: September 7, 2023Inventors: Guillaume Alexandre Blin, Engin Ibrahim Pehlivanoglu
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Publication number: 20230253271Abstract: A semiconductor wafer comprising a first die including a first integrated circuit having a trimmable or programmable component. The trimmable or programmable component is configured to be trimmed or permanently altered in response to an electrical signal. The semiconductor wafer includes a second die arranged adjacent to the first die. The second die includes a second integrated circuit and at least one contact pad arranged to allow an electrical connection to be made to the second integrated circuit. The at least one contact pad is additionally electrically connected to the at least one trimmable or programmable component of the first die such that the at least one contact pad of the second die is configured to act as a probe pad.Type: ApplicationFiled: February 2, 2023Publication date: August 10, 2023Inventors: Guillaume Alexandre Blin, Engin Ibrahim Pehlivanoglu
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Publication number: 20230253270Abstract: A probe card for testing or trimming or programming a semiconductor wafer having a first die including a first integrated circuit having a trimmable or programmable component. The probe card includes at least one probe arranged to make electrical contact with a contact pad of a second die arranged adjacent to the first die. The contact pad of the second die being configured to act as a probe pad and being electrically connected to the trimmable or programmable component of the first die.Type: ApplicationFiled: February 2, 2023Publication date: August 10, 2023Inventors: Guillaume Alexandre Blin, Engin Ibrahim Pehlivanoglu
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Patent number: 11303253Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: GrantFiled: December 4, 2020Date of Patent: April 12, 2022Assignee: Skyworks Solutions, Inc.Inventor: Engin Ibrahim Pehlivanoglu
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Publication number: 20210376224Abstract: Stack assembly for radio-frequency applications. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.Type: ApplicationFiled: June 13, 2021Publication date: December 2, 2021Inventors: Hardik Bhupendra MODI, Adarsh Karan JAISWAL, Anil K. AGARWAL, Engin Ibrahim PEHLIVANOGLU
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Patent number: 11038096Abstract: Stack assembly having electro-acoustic device. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.Type: GrantFiled: October 15, 2018Date of Patent: June 15, 2021Assignee: Skyworks Solutions, Inc.Inventors: Hardik Bhupendra Modi, Adarsh Karan Jaiswal, Anil K. Agarwal, Engin Ibrahim Pehlivanoglu
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Publication number: 20210159860Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: ApplicationFiled: December 4, 2020Publication date: May 27, 2021Inventor: Engin Ibrahim Pehlivanoglu
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Patent number: 10886880Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: GrantFiled: April 6, 2020Date of Patent: January 5, 2021Assignee: Skyworks Solutions, Inc.Inventor: Engin Ibrahim Pehlivanoglu
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Publication number: 20200366256Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: ApplicationFiled: April 6, 2020Publication date: November 19, 2020Inventor: Engin Ibrahim Pehlivanoglu
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Patent number: 10637412Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.Type: GrantFiled: May 17, 2019Date of Patent: April 28, 2020Assignee: Skyworks Solutions, Inc.Inventors: Perihua Ye, Engin Ibrahim Pehlivanoglu, Eric J. Marsan
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Patent number: 10615756Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: GrantFiled: November 26, 2018Date of Patent: April 7, 2020Assignee: Skyworks Solutions, Inc.Inventor: Engin Ibrahim Pehlivanoglu
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Publication number: 20190273475Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.Type: ApplicationFiled: May 17, 2019Publication date: September 5, 2019Inventors: Peihua Ye, Engin Ibrahim Pehlivanoglu, Eric J. Marsan
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Patent number: 10340861Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a gain stage and a bypass stage electrically connected in parallel with one another between an input and an output. The bypass stage and the gain stage are selectively activated based on a mode of the LNA. For example, the gain stage provides inverting amplification to an input signal received at the input in a gain mode. Additionally, the bypass stage provides a low gain path from the input to the output in a bypass mode. Additionally, the bypass stage includes a balun that provides inversion to the bypass stage such that a phase delay through the bypass stage is similar to a phase delay of the gain stage.Type: GrantFiled: October 12, 2017Date of Patent: July 2, 2019Assignee: Skyworks Solutions, Inc.Inventors: Peihua Ye, Engin Ibrahim Pehlivanoglu, Eric J. Marsan
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Publication number: 20190158028Abstract: Apparatus and methods for biasing low noise amplifiers are provided herein. In certain configurations, a low noise amplifier (LNA) includes a transconductance device configured to amplify a radio frequency signal received from an input node, a cascode device electrically connected between an output node and the transconductance device, a first biasing resistor electrically connected between the input node and a ground node, a second biasing resistor electrically connected between the output node and the input node, and a current source electrically connected in series with the cascode device and the transconductance device.Type: ApplicationFiled: January 25, 2019Publication date: May 23, 2019Inventor: Engin Ibrahim Pehlivanoglu
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Publication number: 20190115309Abstract: Stack assembly having electro-acoustic device. In some embodiments, a radio-frequency (RF) module can include a packaging substrate configured to receive a plurality of components, and an electro-acoustic device mounted on the packaging substrate. The RF module can further include a die having an integrated circuit and mounted over the electro-acoustic device to form a stack assembly. The electro-acoustic device can be, for example, a filter device such as a surface acoustic wave filter. The die can be, for example an amplifier die such as a low-noise amplifier implemented on a silicon die.Type: ApplicationFiled: October 15, 2018Publication date: April 18, 2019Inventors: Hardik Bhupendra MODI, Adarsh Karan JAISWAL, Anil K. AGARWAL, Engin Ibrahim PEHLIVANOGLU
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Publication number: 20190097591Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes a mid-node impedance circuit including a resistor and a capacitor electrically connected in parallel, a cascode device electrically connected between an output terminal and the mid-node impedance circuit, and a transconductance device electrically connected between the mid-node impedance circuit and ground. The transconductance device amplifies a radio frequency signal received from an input terminal. The LNA further includes a feedback bias circuit electrically connected between the output terminal and the input terminal and operable to control an input bias voltage of the transconductance device.Type: ApplicationFiled: November 26, 2018Publication date: March 28, 2019Inventor: Engin Ibrahim Pehlivanoglu
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Patent number: 10230332Abstract: Apparatus and methods for biasing low noise amplifiers are provided herein. In certain configurations, a low noise amplifier (LNA) includes an input, an output, a transconductance device, a cascode device, a bias current source, and a feedback bias circuit. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The bias current source generates a bias current that flows through the cascode device and the transconductance device. The feedback bias circuit provides feedback from the LNA's output to the LNA's input to control an input bias voltage of the transconductance device.Type: GrantFiled: August 4, 2017Date of Patent: March 12, 2019Assignee: Skyworks Solutions, Inc.Inventor: Engin Ibrahim Pehlivanoglu