Patents by Inventor Enrique DE LUCAS

Enrique DE LUCAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972520
    Abstract: A method of rendering, in a rendering space, a scene formed by primitives in a graphics processing system. A geometry processing phase includes the step of storing fragment shading rate data representing a first fragment shading rate value and associating data identifying a primitive with the fragment shading rate data. A rendering phase includes the steps of retrieving the stored fragment shading rate data and associated data identifying the primitive, obtaining an attachment specifying one or more attachment fragment shading rate values for the rendering space; processing the primitive to derive primitive fragments to be shaded; and for each primitive fragment, combining the first fragment shading rate value for the primitive from which the primitive fragment is derived with an attachment fragment shading rate value from the attachment to produce a resolved combined fragment shading rate value for the respective fragment.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 30, 2024
    Assignee: Imagination Technologies Limited
    Inventor: Enrique de Lucas
  • Patent number: 11875443
    Abstract: A method of rendering a scene formed by primitives in a graphics processing system. For a sequence of primitives, a pipeline fragment shading rate value and a primitive fragment shading rate value for a primitive are combined to produce a combined fragment shading rate value for the primitive. Fragment shading rate data representing the combined fragment shading rate value for the primitive is stored and data identifying the primitive is associated with the fragment shading rate data. For a subsequent primitive, it is determined whether or not a combined fragment shading rate value for the subsequent primitive is the same as for the preceding primitive. If it is the same, data identifying the subsequent primitive is associated with the fragment shading rate data that the data identifying the preceding primitive is associated with.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: January 16, 2024
    Assignee: Imagination Technologies Limited
    Inventor: Enrique de Lucas
  • Publication number: 20230230308
    Abstract: A method of rendering, in a rendering space, a scene formed by primitives in a graphics processing system. The method includes a geometry processing phase, comprising the step of storing fragment shading rate data representing a first fragment shading rate value and associating data identifying a primitive with the fragment shading rate data. The method further comprises a rendering phase comprising retrieving the stored fragment shading rate data and associated data identifying the primitive, obtaining an attachment specifying one or more attachment fragment shading rate values for the rendering space; processing the primitive to derive primitive fragments to be shaded; and for each primitive fragment, combining the first fragment shading rate value for the primitive from which the primitive fragment is derived with an attachment fragment shading rate value from the attachment to produce a resolved combined fragment shading rate value for the respective fragment.
    Type: Application
    Filed: December 13, 2022
    Publication date: July 20, 2023
    Inventor: Enrique de Lucas Casamayor
  • Publication number: 20230230307
    Abstract: A method of rendering, in a rendering space, a scene formed by primitives in a graphics processing system. A rendering phase receives data describing one or more primitives and one or more associated fragment shading rates to be used during rendering. Fragments for the one or more primitives corresponding to sample positions of the one or more primitives within a region of the rendering space are stored in a buffer sampler. The buffer is parsed to produce microtiles, each microtile corresponding to an array of sample positions within the region and containing sampler fragments from the one or more primitives, the microtiles are analysed to identify shader fragment task instances to be shaded, and the shader fragment task instances are arranged into blocks, wherein at least one block of shader fragment task instances comprises shader fragment task instances from more than one microtile. The blocks of shader fragment task instances are shaded.
    Type: Application
    Filed: December 13, 2022
    Publication date: July 20, 2023
    Inventor: Enrique de Lucas Casamayor
  • Publication number: 20230012814
    Abstract: A method of rendering a scene formed by primitives in a graphics processing system. For a sequence of primitives, a pipeline fragment shading rate value and a primitive fragment shading rate value for a primitive are combined to produce a combined fragment shading rate value for the primitive. Fragment shading rate data representing the combined fragment shading rate value for the primitive is stored and data identifying the primitive is associated with the fragment shading rate data. For a subsequent primitive, it is determined whether or not a combined fragment shading rate value for the subsequent primitive is the same as for the preceding primitive. If it is the same, data identifying the subsequent primitive is associated with the fragment shading rate data that the data identifying the preceding primitive is associated with.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 19, 2023
    Inventor: Enrique de Lucas
  • Publication number: 20230019270
    Abstract: A method of rendering, in a rendering space, a scene formed by primitives in a graphics processing system. A geometry processing phase includes the step of storing fragment shading rate data representing a first fragment shading rate value and associating data identifying a primitive with the fragment shading rate data. A rendering phase includes the steps of retrieving the stored fragment shading rate data and associated data identifying the primitive, obtaining an attachment specifying one or more attachment fragment shading rate values for the rendering space; processing the primitive to derive primitive fragments to be shaded; and for each primitive fragment, combining the first fragment shading rate value for the primitive from which the primitive fragment is derived with an attachment fragment shading rate value from the attachment to produce a resolved combined fragment shading rate value for the respective fragment.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 19, 2023
    Inventor: Enrique de Lucas
  • Patent number: 10101999
    Abstract: A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store collision detection circuit comprising a second bloom filter circuit. The semiconductor chip has one or more processing units capable of executing ordered parallel threads coupled to the load collision detection circuit and the store collision detection circuit. The load collision detection circuit and the store collision detection circuit is to detect younger stores for load operations of said threads and younger loads for store operations of said threads.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: October 16, 2018
    Assignee: intel corporation
    Inventors: Enrique De Lucas, Pedro Marcuello, Oren Ben-Kiki, Ilan Pardo, Yuval Yosef
  • Publication number: 20170147344
    Abstract: A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store collision detection circuit comprising a second bloom filter circuit. The semiconductor chip has one or more processing units capable of executing ordered parallel threads coupled to the load collision detection circuit and the store collision detection circuit. The load collision detection circuit and the store collision detection circuit is to detect younger stores for load operations of said threads and younger loads for store operations of said threads.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 25, 2017
    Inventors: ENRIQUE DE LUCAS, PEDRO MARCUELLO, OREN BEN-KIKI, ILAN PARDO, YUVAL YOSEF
  • Patent number: 9542193
    Abstract: A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store collision detection circuit comprising a second bloom filter circuit. The semiconductor chip has one or more processing units capable of executing ordered parallel threads coupled to the load collision detection circuit and the store collision detection circuit. The load collision detection circuit and the store collision detection circuit is to detect younger stores for load operations of said threads and younger loads for store operations of said threads.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: January 10, 2017
    Assignee: Intel Corporation
    Inventors: Enrique De Lucas, Pedro Marcuello, Oren Ben-Kiki, Ilan Pardo, Yuval Yosef
  • Publication number: 20140189712
    Abstract: A semiconductor chip is described having a load collision detection circuit comprising a first bloom filter circuit. The semiconductor chip has a store collision detection circuit comprising a second bloom filter circuit. The semiconductor chip has one or more processing units capable of executing ordered parallel threads coupled to the load collision detection circuit and the store collision detection circuit. The load collision detection circuit and the store collision detection circuit is to detect younger stores for load operations of said threads and younger loads for store operations of said threads.
    Type: Application
    Filed: December 28, 2012
    Publication date: July 3, 2014
    Inventors: Enrique DE LUCAS, Pedro MARCUELLO, Oren BEN-KIKI, Ilan PARDO, Yuval YOSEF