Patents by Inventor Erasenthiran Poonjolai

Erasenthiran Poonjolai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240054502
    Abstract: The present disclosure is directed to an authentication system, tools, and methods for authentication including a first inspection tool that generates first images for a first inspection of a device, and a first processor for processing the first images using a hashing algorithm, for which the first inspection tool and the first processor are sited at a first location, and a second inspection tool that generates second images for a second inspection of the device, and a second processor for processing the second images using the hashing algorithm, for which the second inspection tool and the second processor are sited at a second location. The second processor compares the first and second sets of hash values to authenticate the device as being authentic and untampered.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 15, 2024
    Inventors: Michael A. SCHROEDER, Sean BUSHELL, William F. HERRINGTON, Hannah ROWE, Sarah SHAHRAINI, Ryan PATE, Erasenthiran POONJOLAI, Saikumar JAYARAMAN, Fariaz KARIM
  • Publication number: 20140120293
    Abstract: The present disclosure relates to the field of fabricating microelectronic devices, wherein a microelectronic device substrate, such as a microelectronic wafer, may be diced into individual microelectronic dice using an adhesive tape which reduces the potential of electrostatic discharge damage by the incorporation or anti-static, and may be compatible with a laser scribing process by the incorporation of ultraviolet light absorbing agents into an adhesive layer of the adhesive tape.
    Type: Application
    Filed: December 22, 2011
    Publication date: May 1, 2014
    Inventors: Mohit Gupta, Haiwei Lu, Dingying D. Xu, Ninad Patel, Kowtilya Bijjula, P. Erasenthiran Poonjolai
  • Patent number: 8207057
    Abstract: A method of forming a microball grid array includes adhering a microball precursor material to a transfer medium under conditions to reflect a selective charge pattern. The method includes transferring the microball precursor material from the transfer medium across a gap and to an integrated circuit substrate under conditions to reflect the selective charge pattern. The method includes achieving the microball grid array without the aid of a mask.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventors: Erasenthiran Poonjolai, Lakshmi Supriva
  • Patent number: 7795116
    Abstract: A wafer-cutting process includes first cutting a semiconductive wafer along a first path at a given first cutting intensity including cutting across an intersection. The process also includes second cutting the semiconductive wafer along a second path at a given second cutting intensity. The second cutting intensity is diminished during crossing the intersection and resumed to the given cutting intensity after crossing the intersection.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: September 14, 2010
    Assignee: Intel Corporation
    Inventors: Mark Dydyk, Erasenthiran Poonjolai
  • Publication number: 20100155923
    Abstract: A method of forming a microball grid array includes adhering a microball precursor material to a transfer medium under conditions to reflect a selective charge pattern. The method includes transferring the microball precursor material from the transfer medium across a gap and to an integrated circuit substrate under conditions to reflect the selective charge pattern. The method includes achieving the microball grid array without the aid of a mask.
    Type: Application
    Filed: December 23, 2008
    Publication date: June 24, 2010
    Inventors: Erasenthiran Poonjolai, Lakshmi Supriva
  • Publication number: 20100081255
    Abstract: Embodiments of an apparatus and methods of reducing defects through selective laser scribing are described herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Inventor: Erasenthiran Poonjolai
  • Publication number: 20100078768
    Abstract: A wafer-cutting process includes first cutting a semiconductive wafer along a first path at a given first cutting intensity including cutting across an intersection. The process also includes second cutting the semiconductive wafer along a second path at a given second cutting intensity. The second cutting intensity is diminished during crossing the intersection and resumed to the given cutting intensity after crossing the intersection.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Inventors: Mark Dydyk, Erasenthiran Poonjolai