Abstract: A method of testing, such as for a bit error rate (BER), of multiple data packet signal transceivers during which a tester and the data packet signal transceivers exchange sequences of test data packets and summary data packets. The tester provides the test data packets which contain respective pluralities of data bits with respective predetermined bit patterns. Responsive thereto, the data packet signal transceivers provide the summary data packets which contain respective summary data indicative of the number of data bits with the respective predetermined bit patterns that are correctly received by corresponding ones of the data packet signal transceivers.

Abstract: The invention described herein utilizes devices under test (DUTs) outfitted with stored, predefined test sequences, testers equipped with vector-signal generation (VSG) and vector-signal analysis (VSA) functionality, and novel methods for combining loopback and single-ended test functions in order to obtain higher testing efficiency for DUTs using Bluetooth or other time-division duplex (TDD) based communications.

Abstract: System and method for facilitating testing of multiple data packet signal transceivers involving data-packet-signal replication and one or more status signals indicating successful and unsuccessful receptions of confirmation signals. Based upon the one or more status signals, one or more control signals cause the replicated data packet signals to be distributed to the devices under test (DUTs) such that, following successful and unsuccessful receptions of confirmation signals, corresponding replicated data packet signals are caused to fail to conform in part or to conform, respectively, with a predetermined data packet signal standard.

Abstract: A method of testing, such as for a bit error rate (BER), of multiple data packet signal transceivers during which a tester and the data packet signal transceivers exchange sequences of test data packets and summary data packets. The tester provides the test data packets which contain respective pluralities of data bits with respective predetermined bit patterns. Responsive thereto, the data packet signal transceivers provide the summary data packets which contain respective summary data indicative of the number of data bits with the respective predetermined bit patterns that are correctly received by corresponding ones of the data packet signal transceivers.

Abstract: System and method for facilitating testing of multiple data packet signal transceivers involving data-packet-signal replication and one or more status signals indicating successful and unsuccessful receptions of confirmation signals. Based upon the one or more status signals, one or more control signals cause the replicated data packet signals to be distributed to the devices under test (DUTs) such that, following successful and unsuccessful receptions of confirmation signals, corresponding replicated data packet signals are caused to fail to conform in part or to conform, respectively, with a predetermined data packet signal standard.

Abstract: The invention described herein utilizes devices under test (DUTs) outfitted with stored, predefined test sequences, testers equipped with vector-signal generation (VSG) and vector-signal analysis (VSA) functionality, and novel methods for combining loopback and single-ended test functions in order to obtain higher testing efficiency for DUTs using Bluetooth or other time-division duplex (TDD) based communications.

Abstract: Circuitry and method for reduce test time for wireless signal systems by using dynamic adaptive correction of DC offsets generated by the test instrument. The data signal is sampled for downstream processing including during pre-, inter-, or post-packet time intervals where no packet-data signal is occurring and where the device's power amplifier is turned off. The sampled data signal is measured for a DC offset occurring during these inter-packet time gaps. Compensating DC offset values are stored in a table indexed by frequency, gain and temperature range. When a subsequent test is carried out at that frequency, gain, and temperature range, the stored compensation value is used to correct the signal. DC offsets continue to be measured, stored and applied to captured signals, continuously refining the compensation values and decreasing the need for time-intensive calibrations. When a measured DC offset exceeds pre-determined limits, the instrument undergo a calibration step.

Abstract: Circuitry and method for reduce test time for wireless signal systems by using dynamic adaptive correction of DC offsets generated by the test instrument. The data signal is sampled for downstream processing including during pre-, inter-, or post-packet time intervals where no packet-data signal is occurring and where the device's power amplifier is turned off. The sampled data signal is measured for a DC offset occurring during these inter-packet time gaps. Compensating DC offset values are stored in a table indexed by frequency, gain and temperature range. When a subsequent test is carried out at that frequency, gain, and temperature range, the stored compensation value is used to correct the signal. DC offsets continue to be measured, stored and applied to captured signals, continuously refining the compensation values and decreasing the need for time-intensive calibrations. When a measured DC offset exceeds pre-determined limits, the instrument undergo a calibration step.