Abstract: Various of the disclosed embodiments contemplate systems and methods for assessing structural complexity within an intra-surgical environment. For example, in some embodiments, surface characteristics from three-dimensional models of a patient interior, such as a colon, bronchial tube, esophagus, etc. may be used to infer the surface's level of complexity. Once determined, complexity may inform a number of downstream operations, such as assisting surgical operators to identify complex regions requiring more thorough review, the automated recognition of healthy or unhealthy tissue states, etc. While some embodiments apply to generally cylindrical internal structures, such as a colon or branching pulmonary pathways, etc., other embodiments may be used within other structures, such as inflated laparoscopic regions between organs, joints, etc. Various embodiments also consider graphical and feedback indicia for representing the complexity assessments.

Abstract: The controller is configured to receive commands from a host device through a PCIe bus having a MAC, send data to the host device through the PCIe bus, and execute a function level reset (FLR) command. The controller includes a direct memory access (DMA) unit and either a drain unit or a drain and drop unit coupled between the DMA and the PCIe bus. The units are configured to prevent transactions associated with the FLR command to pass from the DMA to the MAC during execution of the FLR command, where the preventing transactions comprises receiving a request from the DMA, storing the request in a pipe, removing the request from the pipe, and providing a response to the DMA without delivering the request to the MAC. The drain and drop unit is configured to drop a MAC generated response.

Abstract: The controller is configured to receive commands from a host device through a PCIe bus having a MAC, send data to the host device through the PCIe bus, and execute a function level reset (FLR) command. The controller includes a direct memory access (DMA) unit and either a drain unit or a drain and drop unit coupled between the DMA and the PCIe bus. The units are configured to prevent transactions associated with the FLR command to pass from the DMA to the MAC during execution of the FLR command, where the preventing transactions comprises receiving a request from the DMA, storing the request in a pipe, removing the request from the pipe, and providing a response to the DMA without delivering the request to the MAC. The drain and drop unit is configured to drop a MAC generated response.

Abstract: A device includes a non-volatile memory, first circuitry configured to communicate with the non-volatile memory, and second circuitry configured to communicate with an access device. The second circuitry is configured to retrieve data and metadata associated with the data from a volatile memory of the access device based on a request for the data. The request is received from the first circuitry and includes a first identifier. The metadata includes a second identifier. The second circuitry is further configured to provide at least a portion of the data to the first circuitry in response to the first identifier matching the second identifier.

Abstract: A device includes a non-volatile memory, first circuitry configured to communicate with the non-volatile memory, and second circuitry configured to communicate with an access device. The second circuitry is configured to retrieve data and metadata associated with the data from a volatile memory of the access device based on a request for the data. The request is received from the first circuitry and includes a first identifier. The metadata includes a second identifier. The second circuitry is further configured to provide at least a portion of the data to the first circuitry in response to the first identifier matching the second identifier.