Abstract: A server computer toggles between a protected mode and an unprotected mode. In the protected mode, users are unable to access configuration information due to a Base Address Register (BAR) being cleared. However, a service provider can access a Trusted Platform Module (TPM) through an Application Program Interface (API) request. In an unprotected mode, the BAR is programmed so that users can access the configuration information, but the TPM is blocked. Blocking of the TPM is achieved by changing a configuration file, which changes an overall image of the card. With the modified image not matching an original image, the TPM blocks access to data, such as encryption keys. Separate interfaces can be used for user access (PCIe) and service provider access (Ethernet) to the server computer. The server computer can then be toggled back to the protected mode by switching the configuration file to the original configuration file.

Abstract: Configuration snapshots can be obtained from various connected devices, such as network interface cards or hardware offload devices, to determine whether the configuration matches expected values. If discrepancies are determined then the appropriate values can be automatically applied to those devices. For each type and version of device, there can be a set of expected configuration values, or a golden model of configuration, that is determined and stored. The models can also be used to test updated configuration values, as the new values can be pushed to a subset of devices and the impact on performance determined. If acceptable performance improvement is detected, or another such target achieved, then the golden model can be updated with the new values and those values can be pushed out to the remainder of the devices.

Abstract: Efficient techniques using a multi-port shared non-volatile memory are described that reduce latency in memory accesses from dedicated function specific processors, such as a modem control processor. The modem processor preempts a host processor that is accessing data from a multi-port shared non-volatile memory flash device allowing the modem processor to quickly access data in the flash device. The preemption process uses a doorbell interrupt initiated by a processor that seeks access and interrupts the processor being preempted. After preemption, the host processor may resume or restart the data access. Access control by the processors utilizes a hardware semaphore atomic control mechanism. Power control of the shared non-volatile memory modules includes at least one inactivity timer to indicate when a supply voltage to the shared non-volatile memory modules can be safely reduced or turned off. Power may be restarted by any of the processors sharing the memory, allowing fast access to the data.

Abstract: Techniques for dynamically validating the integrity of a High Level Operating System (HLOS) stored on a data processing device are provided. The techniques include a method for execution on a data processing device including initiating a boot sequence on the data processing device, reading a code partition from a memory unit in the data processing device, such that the code partition is associated with a HLOS stored in the memory unit, performing a cryptographic function on the code partition, storing a result of the cryptographic function in a secure memory, continuing the boot sequence to load at least a portion of the HLOS into a non-secure memory unit, cryptographically signing the result of the cryptographic function stored in the secure memory unit, and sending the encrypted result of the cryptographic function to a remote server.

Abstract: Efficient techniques using a multi-port shared non-volatile memory are described that reduce latency in memory accesses from dedicated function specific processors, such as a modem control processor. The modem processor preempts a host processor that is accessing data from a multi-port shared non-volatile memory flash device allowing the modem processor to quickly access data in the flash device. The preemption process uses a doorbell interrupt initiated by a processor that seeks access and interrupts the processor being preempted. After preemption, the host processor may resume or restart the data access. Access control by the processors utilizes a hardware semaphore atomic control mechanism. Power control of the shared non-volatile memory modules includes at least one inactivity timer to indicate when a supply voltage to the shared non-volatile memory modules can be safely reduced or turned off. Power may be restarted by any of the processors sharing the memory, allowing fast access to the data.

Abstract: One embodiment of the invention comprises a non-transitory, tangible computer readable storage medium encoded with processor readable instructions to perform a method of transferring SDIO data. One method comprises buffering multiple IP packets to transfer from one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client. A multiplexing header is attached to each of the multiple IP packets and one of at least one SDIO read command and at least one SDIO write command issued. The multiple IP packets are then transferred in a single SDIO transfer between the one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client.

Abstract: One embodiment of the invention comprises a non-transitory, tangible computer readable storage medium encoded with processor readable instructions to perform a method of transferring SDIO data. One method comprises buffering multiple IP packets to transfer from one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client. A multiplexing header is attached to each of the multiple IP packets and one of at least one SDIO read command and at least one SDIO write command issued. The multiple IP packets are then transferred in a single SDIO transfer between the one of a SDCC host and a SDIO client to the other of the SDCC host and the SDIO client.

Abstract: A method and apparatus are presented for optimizing write operations for optical storage media. A determination is made, at least in part by iteration, of a next power range and a current score for a current power range. If it is determined that the current score is relatively equivalent to a maximum score, a plurality of final parameters is updated and provided, including an optimal power range and a final score. If it is determined that the current score is relatively greater than the final score, then the plurality of final parameters is updated. If it is determined that a maximum number of iterations has been performed, the plurality of final parameters is provided. Otherwise, the current power range is updated with the next power range. One or more of the returned plurality of final parameters are employed to optimize write operations for optical storage media.

Abstract: A method and apparatus are presented for optimizing write operations for optical storage media. A determination is made, at least in part by iteration, of a next power range and a current score for a current power range. If it is determined that the current score is relatively equivalent to a maximum score, a plurality of final parameters is updated and provided, including an optimal power range and a final score. If it is determined that the current score is relatively greater than the final score, then the plurality of final parameters is updated. If it is determined that a maximum number of iterations has been performed, the plurality of final parameters is provided. Otherwise, the current power range is updated with the next power range. One or more of the returned plurality of final parameters are employed to optimize write operations for optical storage media.

Abstract: A method and apparatus are presented for optimizing write operations for optical storage media. A determination is made, at least in part by iteration, of a next power range and a current score for a current power range. If it is determined that the current score is relatively equivalent to a maximum score, a plurality of final parameters is updated and provided, including an optimal power range and a final score. If it is determined that the current score is relatively greater than the final score, then the plurality of final parameters is updated. If it is determined that a maximum number of iterations has been performed, the plurality of final parameters is provided. Otherwise, the current power range is updated with the next power range. One or more of the returned plurality of final parameters are employed to optimize write operations for optical storage media.