Abstract: The invention relates to a semiconductor device, in particular to a chemical field effect transistor (ChemFET), a high-electron mobility transistor (HEMT) and an ion-sensitive field effect transistor (ISFET), as well as a method for manufacturing the same. The semiconductor device comprises a structure, the structure comprises a substrate, a first layer comprising GaN and a second layer comprising InAlN, wherein the first and the second layer are arranged parallely to each other on the substrate, and wherein the structure comprises a third layer comprising diamond.

Abstract: A semiconductor component includes at least one electrode arrangement, the electrode arrangement having at least two electrodes, at least one electrode of which is an electrode including diamond. The semiconductor component has at least one monolithically integrated solar cell as energy source for the at least one electrode arrangement. The semiconductor component may be used for example in hydrogen production by electrolysis, in electroanalysis and also in water treatment.

Abstract: The invention concerns a semiconductor device comprising a structure, wherein the structure comprising a substrate, a first layer onto the substrate comprising GaN and a second layer comprising AlGaN.

Abstract: A method of manufacturing a transistor, typically a MESFET, includes providing a substrate including single crystal diamond material having a growth surface on which further layers of diamond material can be deposited. The substrate is preferably formed by a CVD process and has high purity. The growth surface has a root-mean-square roughness of 3 nm or less, or is free of steps or protrusions larger than 3 nm. Further diamond layers are deposited on the growth surface to define the active regions of the transistor. An optional n+ shielding layer can be formed in or on the substrate, following which an additional layer of high purity diamond is deposited. A layer of intrinsic diamond may be formed directly on the upper surface of the high purity layer, followed by a boron doped (“delta doped”) layer. A trench is formed in the delta doped layer to define a gate region.

Abstract: The invention relates to a semiconductor device, in particular to a chemical field effect transistor (ChemFET), a high-electron mobility transistor (HEMT) and an ion-sensitive field effect transistor (ISFET), as well as a method for manufacturing the same. The semiconductor device comprises a structure, the structure comprises a substrate, a first layer comprising GaN and a second layer comprising InAlN, wherein the first and the second layer are arranged parallely to each other on the substrate, and wherein the structure comprises a third layer comprising diamond.

Abstract: The present invention relates to a sensor element which has a semiconductor structure based on a Group III-nitride. The semiconductor sensor element serves for determining the pressure, the temperature, a force, a deflection or an acceleration. It has a substrate base 1, disposed thereon, a homogeneous semiconductor layer based on a Group III-nitride, the surface of the homogeneous semiconductor layer 2 orientated towards the substrate base 1 having at least partially a spacing from the surface of the substrate base orientated towards the homogeneous semiconductor layer 2, 2f, and being distinguished in that at least two electrical conducting contacts 5 for conducting an electrical output signal, which can be generated by the homogeneous semiconductor layer 2, 2f, are disposed on, at or under the homogeneous semiconductor layer 2, 2f or are integrated in the latter.

Abstract: The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.

Abstract: A method of manufacturing a transistor, typically a MESFET, includes providing a substrate including single crystal diamond material having a growth surface on which further layers of diamond material can be deposited. The substrate is preferably formed by a CVD process and has high purity. The growth surface has a root-mean-square roughness of 3 nm or less, or is free of steps or protrusions larger than 3 nm. Further diamond layers are deposited on the growth surface to define the active regions of the transistor. An optional n+ shielding layer can be formed in or on the substrate, following which an additional layer of high purity diamond is deposited. A layer of intrinsic diamond may be formed directly on the upper surface of the high purity layer, followed by a boron doped (“delta doped”) layer. A trench is formed in the delta doped layer to define a gate region.

Abstract: The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.

Abstract: The present invention relates to a sensor element which has a semiconductor structure based on a Group III-nitride. The semiconductor sensor element serves for determining the pressure, the temperature, a force, a deflection or an acceleration. It has a substrate base 1, disposed thereon, a homogeneous semiconductor layer based on a Group III-nitride, the surface of the homogeneous semiconductor layer 2 orientated towards the substrate base 1 having at least partially a spacing from the surface of the substrate base orientated towards the homogeneous semiconductor layer 2, 2f, and being distinguished in that at least two electrical conducting contacts 5 for conducting an electrical output signal, which can be generated by the homogeneous semiconductor layer 2, 2f, are disposed on, at or under the homogeneous semiconductor layer 2, 2f or are integrated in the latter.

Abstract: The present invention relates to a field effect transistor having heterostructure with a buffer layer or substrate. A channel is arranged on the buffer layer or on the substrate, and a capping layer is arranged on the channel. The channel consists of a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and channel or the region around the boundary interface between the channel and capping layer is doped in a manner such that the piezocharges occurring at the respective boundary interface are compensated.

Abstract: The invention relates to a component which has a function element arranged on a substrate the function element being electrically contacted in a contact region on its rear side facing the substrate. The substrate has an opening in the contact region and the rear side of the function element is coated with a contact metal.

Abstract: The invention relates to a heterostructure with a buffer layer or substrate, a channel arranged on the buffer layer or substrate and a capping layer arranged on the channel. Said channel is made from a piezopolar material and either the region around the boundary interface between the buffer layer or substrate and the channel, or the region around the boundary interface between the channel and the capping layer is doped in such a way that any piezo charging which occurs at the respective boundary interface is compensated.

Abstract: Ablation instrument is provided for cutting, fragmenting and/or removing material of an object, containing a carrier substrate, having at least one resistance-heated layer which is disposed on the substrate and made of doped diamond or diamond-like carbon (DLC) and also at least one electrical lead and at least one electrical discharge which are both electrically connected at different places by the resistance-heated layer.

Abstract: The invention relates to a microactuator arranged on a thermally insulating layer (2) and having a resistance layer (4) made from doped diamond, which is provided with an electrical supply and an electrical leakage (9).

Abstract: The invention relates to a microactuator arranged on a thermally insulating layer (2) and having a resistance layer (4) made from doped diamond, which is provided with an electrical supply and an electrical leakage (9)

Abstract: A growth substrate having growth nuclei made of diamond and/or diamond-like carbon arranged on its growth surface, the orientation of over 50% of the growth nuclei deviating by less than 10.degree. from the crystal orientation defined by the growth substrate corresponding to Miller's indices (h, k, l) and the nucleus density changes between the center of the growth substrate and a distance of maximally 15 mm from the center by maximally 80%. The method also relates to a process for the growth substrate's manufacture.

Abstract: A high electron mobility transistor includes a donor layer of aluminum gallium arsenide (AlGaAs) for forming a two-dimensional electron gas (2DEG) in a proximate buffer layer of gallium arsenide. The donor layer has a composition profile including a relatively high concentration of aluminum over a first thickness portion proximate the buffer layer, a low and constant concentration of aluminum over a second thickness portion distal from the buffer layer and a graded concentration of aluminum in a third thickness portion of the donor layer between the first and second thickness portions, transitioning between the high and the low concentrations of aluminum. The donor layer has a doping profile including a high level doping spike in the first thickness portion and a low doping level over the second and third thickness portions.

Abstract: A varactor diode comprising a semiconductor element, with a pn-junction barrier layer or rectifying metal semiconductor junction on one outer face, an ohmic substrate contact on the opposite outer face and a glass casing in which the diode is hermetically sealed.

Abstract: A modulation-doped field effect transistor includes an undoped semiconductor layer and an arrangement for supplying charge carriers into a region of the semiconductor layer adjacent one side. An arrangement is provided for locally modulating hole and electron density in another region adjacent the other side of the semiconductor layer in a repeating pattern of alternations so as to inhibit current flow in the direction of the alternations.