Patents by Inventor Eric Campos Canton

Eric Campos Canton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10171229
    Abstract: The present invention is related with a computer-implemented method for generating a pseudo-random bit generator including the steps: a. Defining a multi-modal map by the equation: ƒ?=?(dr+1?x)(x?dr), x??r; b. Set the value of k?+, and obtaining the values of ?j, for j=from at least 1, to the final value k by the following equations: ?1=4k; ?j=(j)(?1); for 2?j?k; and taking the values of ?j and split the space into 2j regions ?1j, to ?2jj which are determined by values ?1j to k(2j)?1j.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: January 1, 2019
    Assignee: Instituto Potosino de Investigacion Cientifica y Tecnologica AC
    Inventors: Eric Campos Canton, Moises Garcia Martinez
  • Patent number: 9793897
    Abstract: The present invention relates to the field of reconfigurable computing also known as dynamic computing and, more particularly, to reconfigurable architectures logic gates and programmable wiring connections between them and the input interfaces and output interfaces. There is growing interest in developing new hardware architectures to complement or replace existing static architectures, and recently, there has been a theoretical direction to explore the richness of nonlinear dynamical systems to implement reconfigurable hardware (dynamic). The present invention is to use a nonlinear to emulate different logic gates dynamic system that are the basis of general-purpose computing, and after obtaining the logic gates, integrate these elements into a programmable device by the user, ie for create a field programmable array of reconfigurable logic gates.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: October 17, 2017
    Inventors: Eric Campos Canton, Moises Garcia Martinez, Roberto Rafael Rivera Duron
  • Publication number: 20160380760
    Abstract: The present invention is related with a computer-implemented method for generating a pseudo-random bit generator including the steps: a. Defining a multi-modal map by the equation: f?=?(dr+1?x)(x?dr), x ? ?r; b. Set the value of k ? +, and obtaining the values of ?j, for j=from at least 1, to the final value k by the following equations: ?1=4k; ?j=(j)(?1); for 2?j?k and taking the values of ?j and split the space into 2j regions ?1j, to ?2jj which are determined by values k1j to k(2j)?1j.
    Type: Application
    Filed: June 23, 2016
    Publication date: December 29, 2016
    Applicant: Instituto Potosino de Investigación Científica y Tecnológica A.C.(40%)
    Inventors: Eric CAMPOS CANTON, Moises GARCIA MARTINEZ
  • Patent number: 8823464
    Abstract: A reconfigurable element based on nonlinear (chaotic) dynamics is adapted to implement the three different multivibrator configurations. A nonlinear dynamical system, under parameter modulating control, operates as a tunable oscillator with different dynamical regimes which in turn provide the different multivibrator configurations (monostable, astable, and bistable). The reconfigurable multivibrator is realized as a tunable circuit which includes an input stage for receiving at least one input voltage signal and an output stage that produces a digital two-level electric output signal. The all-in-one reconfigurable multivibrator device consisting of a nonlinear oscillator circuit electrically coupled to the input/output circuitry is used in at least, but not limited to three basic applications, namely, an irregular width pulse generator, a rising flank trigger and a full RS flip-flop device.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: September 2, 2014
    Assignee: Instituto Potosino de Investigacion Cientifica y Tecnológica A.C.
    Inventors: Eric Campos Canton, Isaac Campos Canton, Juan Gonzalo Barajas Ramirez, Alejando Ricardo Femat Flores
  • Patent number: 8587343
    Abstract: A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal or signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: November 19, 2013
    Assignee: Instituto Potosino de Investigacion Cientifica y Tecnologica A.C.
    Inventors: Eric Campos Canton, Isaac Campos Canton, Haret Codratian Rosu
  • Publication number: 20130002293
    Abstract: A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal o signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.
    Type: Application
    Filed: May 30, 2012
    Publication date: January 3, 2013
    Inventors: Eric Campos Canton, Isaac Campos Canton, Haret Codratian Rosu