Patents by Inventor Eric F. Ziolko

Eric F. Ziolko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5729559
    Abstract: An apparatus for and method of correcting errors in a received signal comprised of a rate-one orthogonal convolutional code generated by an LFSR involved feeding (403) a received signal into a multiple-stage shift register (201). Estimates of one of the stages of the shift register are performed by estimators (203, 205, 207, 209, 211, 213, and 215) and are based on the outputs of several of the other stages of the shift register (201). These estimates are combined on a bit-by-bit basis to provide a corrected received signal, which is used as the output of the shift register (201).
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: March 17, 1998
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Eric F. Ziolko
  • Patent number: 5377229
    Abstract: A transceiver compatible with both wide channel constant envelope 4 level FSK FM modulation and narrow channel .pi./4 differential QPSK linear modulation allows compatible interaction between modified constant envelope and non-constant envelope transmitters. All Nyquist filtering occurs in the transmitters, and none in the receiver.
    Type: Grant
    Filed: December 19, 1990
    Date of Patent: December 27, 1994
    Assignee: Motorola, Inc.
    Inventors: Alan L. Wilson, Mark C. Cudak, Bradley M. Hiben, Eric F. Ziolko, Steven C. Jasper
  • Patent number: 4914697
    Abstract: A cryptographic apparatus for encrypting and decrypting digital words includes a mechanism that permits a cipher algorithm to be electronically stored after the manufacture of the apparatus. The storing mechanism includes at least one electrically erasable, programmable gate array containing a portion of the cipher algorithm and at least one random access memory device coupled to the array for storing digital data generated by the algorithm. A mechanism which is coupled to the gate array and memory device controls the execution of the algorithm for each digital word thereby decrypting encrypted digital words and encrypting non-encrypted digital words.
    Type: Grant
    Filed: February 1, 1988
    Date of Patent: April 3, 1990
    Assignee: Motorola, Inc.
    Inventors: Ezzat A. Dabbish, John P. Byrns, Michael J. McClaughry, Larry C. Puhl, Daniel P. Brown, Eric F. Ziolko, Michael W. Bright
  • Patent number: 4893339
    Abstract: Disclosed is a synchronous secure communication system wherein an information signal is encrypted in an encryption means. The encrypted signal is compressed to allow the insertion of a synchronization signal, and the combined signals are transmitted. At the receiver, the synchronization signal is extracted and used to synchronize the receiver to the incoming data stream thereby improving receiver sensitivity and range.
    Type: Grant
    Filed: September 30, 1986
    Date of Patent: January 9, 1990
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Eric F. Ziolko, Alan L. Wilson, Michelle M. Bray, Harry A. Hennen, David L. Weiss
  • Patent number: 4893308
    Abstract: Disclosed is a method and apparatus for time companding a digital voice signal wherein, single bits are periodically removed from the digital voice signal, which is then compressed thereby forming a contiguous area of removed bits. A synchronization signal is inserted into this area and the combined signal is transmitted. At the receiver, the synchronization signal is extracted and is used to synchronize the receiver. The digital voice signal is then expanded and the removed bits are predicted and replaced.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: January 9, 1990
    Assignee: Motorola, Inc.
    Inventors: Alan L. Wilson, Michael W. Bright, Michelle M. Bray, Eric F. Ziolko, David L. Weiss
  • Patent number: 4882751
    Abstract: A trunked communications system that accommodates encrypted secure communications. The system uses both non-encrypted message detectors and encrypted message detectors to assure that the trunked central control unit receives the signals it must receive in order to properly allocate and maintain channel assignments.
    Type: Grant
    Filed: October 31, 1986
    Date of Patent: November 21, 1989
    Assignee: Motorola, Inc.
    Inventors: Michael D. Kotzin, Kenneth J. Zdunek, Eric F. Ziolko
  • Patent number: 4827514
    Abstract: A synchronization detector is disclosed wherein a portion of the received data stream is parallel loaded into a sequence generating means. The sequence generating means provides a local synchronization sequence that is compared to the transmitted synchronization signal, and an error count is tallied. If the number of errors occurring in a predetermined "window" is below a predetermined threshold, a synchronization detect signal is asserted. However, if the errors in a predetermined window exceed the threshold, the sequence generating means is reloaded with another portion of the received data stream and the process is repeated until the synchronization detect signal is asserted.
    Type: Grant
    Filed: March 3, 1988
    Date of Patent: May 2, 1989
    Assignee: Motorola, Inc.
    Inventors: Eric F. Ziolko, Harry A. Hennen
  • Patent number: 4747105
    Abstract: A detector locates a shift register sequence within a digital data stream by correlating the data stream with a sequence generated locally from a portion of the data stream. Error correction circuitry estimates errors that may have corrupted the sequence during transmission across a noisy channel and corrects them to the extent possible. The data stream and local sequence are correlated during an interval that is shifted either ahead or behind the portion of the error-corrected data stream used to initialize the local sequence generator, thereby avoiding the region during which short-term correlation between the data stream and local sequence would otherwise cause false indications of detection when only noise or random data is being received.
    Type: Grant
    Filed: September 3, 1986
    Date of Patent: May 24, 1988
    Assignee: Motorola, Inc.
    Inventors: Alan L. Wilson, Michael W. Bright, Eric F. Ziolko
  • Patent number: 4667327
    Abstract: Disclosed is an error corrector for a linear feedback shift register sequence employing an open loop linear feedback shift register (LFSR) having selected bits "tapped" and combined to form a feedback signal. The taps implement an orthogonal convolutional code that is inherently redundant, therefore, the transmission of parity bits is not required. The feedback signal is combined with the received synchronization signal to form an error estimate that is temporarily stored in a syndrome register. By majority voting a selected outputs of the syndrome register a reliable determination of a received error can be made. Once an error determination is made, a correction signal is generated to correct the bit in error thereby providing a high probability of initiating and maintaining synchronization.
    Type: Grant
    Filed: April 2, 1985
    Date of Patent: May 19, 1987
    Assignee: Motorola, Inc.
    Inventors: Michael W. Bright, Eric F. Ziolko, Alan L. Wilson
  • Patent number: 4406010
    Abstract: CVSD modulation is detected by applying a digital signal containing CVSD information to a digital filter that is in the CVSD loop that includes a syllabic filter and a rule circuit. The digital filter includes voltage-operated switches that switch one of two voltages to a resistor network and thereby combine multiplication and digital filtering. The output of the digital filter is the output of the circuit.
    Type: Grant
    Filed: December 30, 1980
    Date of Patent: September 20, 1983
    Assignee: Motorola, Inc.
    Inventors: David L. Weiss, Eric F. Ziolko, Tim A. Williams