Abstract: A flight control system includes an output device, a first processor, and a second processor. The second processor is dissimilar to the first processor. The flight control system also includes a first arbitration device coupled to the first processor and a second arbitration device coupled to the second processor. The second arbitration device is configured to coordinate transaction synchronization with the first arbitration device and the first arbitration device is configured to coordinate transaction synchronization with the second arbitration device. A comparator processor is coupled to the first arbitration device and the second arbitration device. The comparator processor is configured to compare transaction synchronized outputs of the first and second processors and the comparator processor effectuates a command to the output device if the comparison is valid.

Abstract: A method of comparing output information from dissimilar processors includes storing a task in a first memory and storing the task in a second memory at substantially the same time as the first memory. The time of the storing being is controlled by a first arbitration logic and a second arbitration logic. The method also includes receiving the task by a first processor from the first memory and receiving the task by a second processor from the memory at substantially the same time as the first processor. The time being received is controlled by a first arbitration logic and a second arbitration logic. The second processor being dissimilar to the first processor. The method further includes computing a first output by the first processor based on the task and computing a second output by the second processor based on the task. The method still further includes, synchronizing the first and second outputs so that the first and second outputs are output at substantially the same time.