Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

Abstract: The overall performance of single input multiple output (SIMO) switching DC-DC power converters may be improved by controlling power and output switches to adjust inductor current delivered to one output while maintaining substantially constant the current delivered to other outputs, thereby reducing cross regulation interference across outputs. Power converter systems of this disclosure may be configured to calculate an inductor current value and a duty cycle value based on voltages at each of the voltage outputs. The power converter systems may be configured to control at least one main power switch to increase or decrease the current in the inductor based on the calculated inductor current value. Additionally, the power converter systems may be configured to control at least one output power switch to divert current from the inductor to one of the plurality of output nodes based on the calculated duty cycle value.

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

Abstract: The overall performance of single input multiple output (SIMO) switching DC-DC power converters may be improved by controlling power and output switches to adjust inductor current delivered to one output while maintaining substantially constant the current delivered to other outputs, thereby reducing cross regulation interference across outputs. Power converter systems of this disclosure may be configured to calculate an inductor current value and a duty cycle value based on voltages at each of the voltage outputs. The power converter systems may be configured to control at least one main power switch to increase or decrease the current in the inductor based on the calculated inductor current value. Additionally, the power converter systems may be configured to control at least one output power switch to divert current from the inductor to one of the plurality of output nodes based on the calculated duty cycle value.

Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

Abstract: The handling of disturbances to audio signals may be improved with an adaptive noise cancellation (ANC) system that performs tone suppression and howl suppression in a collaborative manner. Such ANC systems may be configured to detect a first tone in an input signal at a first tone frequency and extract the detected first tone from the input signal. The ANC systems may also be configured to adaptively filter the extracted first tone to generate a second tone that has a magnitude that is approximately equal to a magnitude of the extracted first tone and a phase that is approximately opposite the phase of the extracted first tone. The ANC systems may be further configured to add the second tone to an intermediate signal that is based, at least in part, on the input signal to generate the output signal.

Abstract: The present invention provides novel methods and processes for polymerizing unsaturated substrates, such as alkyne bearing monomers, with arenes. The polymerizations are catalyzed by gold (Au) catalysts/complexes and/or other cocatalysts. The invention further provides novel structurally complex polymers prepared in high yield via an intermolecular polyhydroarylation mechanism. Such resulting products comprise oligomeric and polymeric materials with novel molecular architectures and microstructures, which subsequently impart unique properties. The invention includes both the synthesis methods and processes and the resulting compounds and compositions of matter.

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

Abstract: The handling of disturbances to audio signals may be improved with an adaptive noise cancellation (ANC) system that performs tone suppression and howl suppression in a collaborative manner. Such ANC systems may be configured to detect a first tone in an input signal at a first tone frequency and extract the detected first tone from the input signal. The ANC systems may also be configured to adaptively filter the extracted first tone to generate a second tone that has a magnitude that is approximately equal to a magnitude of the extracted first tone and a phase that is approximately opposite the phase of the extracted first tone. The ANC systems may be further configured to add the second tone to an intermediate signal that is based, at least in part, on the input signal to generate the output signal.

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

Abstract: A device, system, and method for creating a molded crayon body are provided. In embodiments, the device includes a receiving and positioning device having a channel for receiving a wax stick. The channel may be configured to receive and position a wax stick for melting by a melting component. The device may further include a positioning and/or adjustment component that raises and lowers a mold plate with respect to a front surface of the melting component. In some embodiments, the melting component includes a nozzle having a nozzle tip configured to transfer melted portions of the wax stick from the nozzle of the melting component to a mold on a mold plate. The mold component may also include a chilling mechanism for cooling a completed, molded crayon body.

Abstract: A device, method, and system for creating a design on a design surface are provided. The device includes a first compartment that includes a receiving and positioning component and a channel configured to receive and position a wax stick at the receiving and positioning component. The device includes a second compartment having a melting component that includes a heating element, a temperature measurement element, and a nozzle. The nozzle includes a nozzle opening configured to receive the wax stick, the nozzle directly aligned with the channel of the receiving and positioning component. The nozzle also includes a nozzle tip configured to transfer melted portions of the wax stick from the nozzle to a design surface on a spinning component in a third compartment of the device.

Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

Abstract: An LED lighting device includes an auxiliary power supply that supplies power to a control circuit of the LED lighting device that receives an input from a terminal of a light-emitting diode (LED) string of the lighting device that has a substantially lower voltage than the line voltage to which the lighting device is connected. The terminal may be within the LED string, or may be an end of the string. A linear regulator may be operated from the voltage drop across a number of the LEDs in the string so that the energy wasted by the auxiliary power supply is minimized. In other designs, the auxiliary power supply may be intermittently connected in series with the LED string only when needed. The intermittent connection can be used to forward bias a portion of the LED string when the voltage supplied to the LED string is low, increasing overall brightness.

Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.

Abstract: A line-frequency determining circuit for coupling to the output of a thyristor-switched dimmer that determines a line-frequency of an AC power source that supplies an input to the thyristor-controlled dimmer permits accurate control of periodic probing of the dimmer output. The probing is performed to predict zero-cross times of the AC power source that, in turn, are used to determine a dimming control value of the thyristor-switched dimmer. A minimum conductance is applied across the output of the dimmer during the probing intervals that begin at the turn-on time of the dimmer and last until enough information has been gathered to correctly predict a next zero crossing of the AC line voltage that supplies the input of the dimmer. The probing can be performed at intervals of an odd number of half-cycles of the AC line frequency so that internal dimmer timer operation is not affected by DC offset.

Abstract: A bipolar junction transistor (BJT) may be used in a power stage DC-to-DC converter, such as for LED-based light bulbs. The BJT may be switched on and off from a controller coupled to two terminals of the BJT. Through the two terminals, the control IC may dynamically adjust a reverse recovery time period of the BJT. The reverse recovery time period may be adjusted by changing an amount of base charge that accumulates on the BJT. Additional, the reverse recovery may be controlled through the use of a reverse base current source applied to the BJT after beginning switching off the BJT.

Abstract: A motion base comprises lower and upper plates, a plurality of lateral stabilizers coupled in-between and connected to the lower and upper plates, a plurality of actuators, and one or more associated active controllers. Actuators typically comprise a body operatively connected to the upper plate and the lower plate, a rod movably disposed at least partially within the body, where the rod and body define an actuator effective length; and a controllable rod extender configured to selectively extend the rod out from and retract the rod into the body.