Abstract: Digital logic circuitry includes a plurality of logic blocks and memories that execute a method to stitch images. The method includes capturing the images with a plurality of pixel sensors, providing blocks of intensity values captured by the pixel sensors to input/output (I/O) pins of the digital logic circuitry, processing the intensity values with the digital logic circuitry, and stitching the processed images into a stitched image.

Abstract: Head-mounted display (HMD) provides a virtual reality to a user that controls the HMD with a keyboard. The HMD has a housing with a left lens and a right lens, a smartphone that includes a display, a camera that captures video signals of the keyboard, and a processer. The display simultaneously displays the virtual reality and the keyboard through which instructions are sent from the user to the HMD.

Abstract: Digital logic circuitry includes a plurality of logic blocks and memories that execute a method to stitch images. The method includes capturing the images with a plurality of pixel sensors, providing blocks of intensity values captured by the pixel sensors to input/output (I/O) pins of the digital logic circuitry, processing the intensity values with the digital logic circuitry, and stitching the processed images into a stitched image.

Abstract: Digital logic circuitry includes a plurality of logic blocks and memories that execute a method to stitch images. The method includes capturing the images with a plurality of pixel sensors, providing blocks of intensity values captured by the pixel sensors to input/output (I/O) pins of the digital logic circuitry, processing the intensity values with the digital logic circuitry, and stitching the processed images into a stitched image.

Abstract: Head-mounted display (HMD) provides a virtual reality to a user that controls the HMD with a keyboard. The HMD has a housing with a left lens and a right lens, a smartphone that includes a display, a camera that captures video signals of the keyboard, and a processer. The display simultaneously displays the virtual reality and the keyboard through which instructions are sent from the user to the HMD.

Abstract: Digital logic circuitry includes a plurality of logic blocks and memories that execute a method to stitch images. The method includes capturing the images with a plurality of pixel sensors, providing blocks of intensity values captured by the pixel sensors to input/output (I/O) pins of the digital logic circuitry, processing the intensity values with the digital logic circuitry, and stitching the processed images into a stitched image.

Abstract: A method and device for encoding and decoding video image data. An MPEG decoding and encoding process using data flow pipeline architecture implemented using complete dedicated logic is provided. A plurality of fixed-function data processors are interconnected with at least one pipelined data transmission line. At least one of the fixed-function processors performs a predefined encoding/decoding function upon receiving a set of predefined data from said transmission line. Stages of pipeline are synchronized on data without requiring a central traffic controller. This architecture provides better performance in smaller size, lower power consumption and better usage of memory bandwidth.

Abstract: A method and system for adaptive matrix trimming in an inverse discrete cosine transform (IDCT) operation. At least one row of an input matrix is accessed. At least one matrix element of the row having a value of zero is detected. During execution of an IDCT multiplication operation on the row for generating an output row, IDCT multiplication operation for a matrix element having a value of zero is skipped.