Patents by Inventor Eric L. Debes

Eric L. Debes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10732973
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 4, 2020
    Assignee: Intel Corporation
    Inventors: Julien Sebot, William W. Macy, Jr., Eric L. Debes, Huy V. Nguyen
  • Publication number: 20190220280
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: December 3, 2018
    Publication date: July 18, 2019
    Inventors: Julien Sebot, William W. Macy, JR., Eric L. Debes, Huy V. Nguyen
  • Patent number: 10152323
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: December 11, 2018
    Assignee: Intel Corporation
    Inventors: Patrice L. Roussel, William W. Macy, Jr., Huy V. Nguyen, Eric L. Debes
  • Patent number: 10146541
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Julien Sebot, William W. Macy, Jr., Eric L. Debes, Huy V. Nguyen
  • Publication number: 20170039066
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Applicant: lntel Corporation
    Inventors: Patrice L. Roussel, William W. Macy, JR., Huy V. Nguyen, Eric L. Debes
  • Patent number: 9477472
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: William W. Macy, Jr., Eric L. Debes, Patrice L. Roussel, Huy V. Nguyen
  • Publication number: 20160070575
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Application
    Filed: November 12, 2015
    Publication date: March 10, 2016
    Applicant: INTEL CORPORATION
    Inventors: Julien Sebot, William W. Macy, JR., Eric L. Debes, Huy V. Nguyen
  • Patent number: 9229719
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: William W. Macy, Jr., Eric L. Debes, Patrice L. Roussel, Huy V. Nguyen
  • Patent number: 9229718
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: January 5, 2016
    Assignee: Intel Corporation
    Inventors: William W. Macy, Jr., Eric L. Debes, Patrice L. Roussel, Huy V. Nguyen
  • Patent number: 9218184
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 22, 2015
    Assignee: Intel Corporation
    Inventors: Julien Sebot, William W. Macy, Jr., Eric L. Debes, Huy V. Nguyen
  • Patent number: 9189238
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9189237
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: November 17, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182988
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182985
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9182987
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: November 10, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9170815
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9170814
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: October 27, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Matthew Holliman, Eric L. Debes, Minerva M. Yeung, Huy V. Nguyen, Julien Sebot
  • Patent number: 9152420
    Abstract: Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 6, 2015
    Assignee: Intel Corporation
    Inventors: Yen-Kuang Chen, William W. Macy, Jr., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
  • Publication number: 20150154023
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 4, 2015
    Applicant: INTEL CORPORATION
    Inventors: William W. Macy, JR., Eric L. Debes, Patrice L. Roussel, Huy V. Nguyen
  • Publication number: 20150121039
    Abstract: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the individual control element is shuffled to an associated resultant data element position if its flush to zero field is not set and a zero is placed into the associated resultant data element position if its flush to zero field is not set.
    Type: Application
    Filed: December 30, 2014
    Publication date: April 30, 2015
    Applicant: Intel Corporation
    Inventors: William W. Macy, JR., Eric L. Debes, Patrice L. Roussel, Huy V. Nguyen