Patents by Inventor Eric P. Traut

Eric P. Traut has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7225119
    Abstract: In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. The replaced processor settings are written to memory. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: May 29, 2007
    Assignee: Microsoft Corporation
    Inventor: Eric P. Traut
  • Patent number: 7210144
    Abstract: A method for monitoring and emulating privileged instructions of a program that is being executed at a privilege level in a virtual machine is disclosed. A privilege level associated with a received instruction is determined. The instruction privilege level is compared to the program execution privilege level. If the instruction privilege level is valid with respect to the program execution privilege level, the instruction is executed. If the instruction privilege level is invalid with respect to the program execution privilege level: the instruction result is emulated; the number of times the instruction has been received from the program is checked; and if the instruction has been received more than a specified number of times, the instruction is overwritten with one or more instructions with a valid privilege level with respect to the program execution privilege level.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: April 24, 2007
    Assignee: Microsoft Corporation
    Inventor: Eric P. Traut
  • Patent number: 7158927
    Abstract: In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. The replaced processor settings are written to memory. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: January 2, 2007
    Assignee: Microsoft Corporation
    Inventor: Eric P. Traut
  • Patent number: 7085705
    Abstract: In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. The replaced processor settings are written to memory. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: August 1, 2006
    Assignee: Microsoft Corporation
    Inventor: Eric P. Traut
  • Patent number: 6980946
    Abstract: A method for processing software instructions in an emulated computing environment is provided in which instruction blocks from the application programs of a guest computer system are parsed to determine whether the instruction blocks include instructions executable at user level or supervisor level. Those instruction blocks that are executable at user level are passed directly to the processor of the host computer system, and those instruction blocks that are executable at supervisor level, are translated before being passed to the processor for execution. In the case of instruction blocks that include instruction blocks executable at supervisor level, prior to translation, a cache is queried to determine whether a translation for the instruction block is in the case. If a translation is in the cache, the translated version in the cache is provided to the processor for execution. If a translation is not in the cache, translation occurs, and the translated instruction block is saved to the cache.
    Type: Grant
    Filed: March 15, 2001
    Date of Patent: December 27, 2005
    Assignee: Microsoft Corporation
    Inventors: Aaron Giles, Eric P. Traut
  • Patent number: 6968350
    Abstract: A method for performing a write operation to a hard drive or other memory space is provided. The hard drive is represented as at least two files. The first file is a parent drive and includes some content of the hard drive. Writes made to the hard drive are recorded in a second file, known as a differencing drive. Because no changes are made to the content of the parent drive, the content of the hard drive may be rolled back to the content of the parent drive by discarding the differencing drive.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: November 22, 2005
    Assignee: Microsoft Corporation
    Inventors: Eric P. Traut, Aaron S. Giles, Parag Chakraborty
  • Publication number: 20040025158
    Abstract: A method for monitoring and emulating privileged instructions of a program that is being executed at a privilege level in a virtual machine is disclosed. A privilege level associated with a received instruction is determined. The instruction privilege level is compared to the program execution privilege level. If the instruction privilege level is valid with respect to the program execution privilege level, the instruction is executed. If the instruction privilege level is invalid with respect to the program execution privilege level: the instruction result is emulated; the number of times the instruction has been received from the program is checked; and if the instruction has been received more than a specified number of times, the instruction is overwritten with one or more instructions with a valid privilege level with respect to the program execution privilege level.
    Type: Application
    Filed: August 2, 2002
    Publication date: February 5, 2004
    Inventor: Eric P. Traut
  • Publication number: 20040010787
    Abstract: A method is provided for increasing the efficiency of virtual machine processing. A parent virtual machine is provided on a host computer. The parent virtual machine is temporarily or permanently suspended. A child virtual machine is created at a new location by forking the parent virtual machine. The child virtual machine may not initially include all the stored data that is associated with the parent virtual machine.
    Type: Application
    Filed: July 11, 2002
    Publication date: January 15, 2004
    Inventors: Eric P. Traut, Rene A. Vega
  • Patent number: 6651132
    Abstract: A method for tracking the changes to the emulated page tables of a host computer system is disclosed in which each memory location accessed by the guest computer system is placed on one of several hierarchical address translation lists maintained by the host computer system. In response to one or more events in the guest computer system, the contents of one or more of the address translation lists of the host computer system are unmapped as a means of tracking in the host computer system changes made to the address translation of virtual addresses to physical addresses in the emulated computer system.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: November 18, 2003
    Assignee: Microsoft Corporation
    Inventor: Eric P. Traut
  • Publication number: 20020147862
    Abstract: A method for performing a write operation to a hard drive or other memory space is provided. The hard drive is represented as at least two files. The first file is a parent drive and includes some content of the hard drive. Writes made to the hard drive are recorded in a second file, known as a differencing drive. Because no changes are made to the content of the parent drive, the content of the hard drive may be rolled back to the content of the parent drive by discarding the differencing drive.
    Type: Application
    Filed: July 30, 2001
    Publication date: October 10, 2002
    Inventors: Eric P. Traut, Aaron Giles, Parag Chakraborty
  • Publication number: 20020133810
    Abstract: A method for processing software instructions in an emulated computing environment is provided in which instruction blocks from the application programs of a guest computer system are parsed to determine whether the instruction blocks include instructions executable at user level or supervisor level. Those instruction blocks that are executable at user level are passed directly to the processor of the host computer system, and those instruction blocks that are executable at supervisor level, are translated before being passed to the processor for execution. In the case of instruction blocks that include instruction blocks executable at supervisor level, prior to translation, a cache is queried to determine whether a translation for the instruction block is in the case. If a translation is in the cache, the translated version in the cache is provided to the processor for execution. If a translation is not in the cache, translation occurs, and the translated instruction block is saved to the cache.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 19, 2002
    Inventors: Aaron Giles, Eric P. Traut
  • Publication number: 20020099532
    Abstract: In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. The replaced processor settings are written to memory. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
    Type: Application
    Filed: December 21, 2000
    Publication date: July 25, 2002
    Inventor: Eric P. Traut
  • Publication number: 20020082823
    Abstract: In an emulated computing environment, a method is provided for logically decoupling the host operating system from the processor of the computer system with respect to certain processor settings of the processor. A hypervisor of the emulation program replaces some of the processor settings of the processor with processor settings associated with software routines or data structures provided by the guest operating system. The replaced processor settings are written to memory. During this period, when the processor calls a software routine or accesses a data structure associated with the replaced processor setting, the processor will call or access a software routine or access a data structure associated with the guest operating system, bypassing the host operating system and communicating directly with the guest operating system. When the host operating system is to be recoupled to the processor, the processor settings that have been saved to memory are rewritten to the appropriate registers of the processor.
    Type: Application
    Filed: July 16, 2001
    Publication date: June 27, 2002
    Inventor: Eric P. Traut
  • Patent number: 6256658
    Abstract: The invention provides a method and apparatus for switching between execution of a plurality of object code types having different conventions for invoking program procedures and performing stack manipulations. The invention may also be used to switch between different calling conventions within a single object code type. Briefly according to the invention, a computer system comprises a routine descriptor, a stack switch frame, a mode switching mechanism for switching from a first processor, code or calling convention type to a second processor, code or calling convention type and means for executing instructions in various code types. A routine descriptor describes a program or code segment and its code type and calling conventions. A routine descriptor contains, among other information, a “mixed mode” field which is set to a specific, predetermined value such as a value indicating an instruction which is not legal in the runtime environment of a first processor, code or calling convention type.
    Type: Grant
    Filed: March 22, 1995
    Date of Patent: July 3, 2001
    Assignee: Apple Computer, Inc.
    Inventors: Jean-Charles D. Mourey, Sean R. Parent, Bruce K. Jones, Alan W. Lillich, Erik L. Eidt, Eric P. Traut
  • Patent number: 5790825
    Abstract: An architecture and method for emulating guest instructions with host instructions, executable on a host computer, based on a translation scheme. The architecture includes a guest instruction memory and program counter and a RAM memory storing host instructions, in which an address word stored in the program counter is mapped to the RAM memory to access the host instructions. The method constitutes dynamically recompiling (DR) host instructions including providing one memory which stores host instructions, providing in other memory having line entries for storing a fixed number of dynamically recompiled host instructions, and copying a host instruction from the one memory into a line entry of the other memory.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: August 4, 1998
    Assignee: Apple Computer, Inc.
    Inventor: Eric P. Traut
  • Patent number: 5452456
    Abstract: The invention provides a method and apparatus for switching between execution of a plurality of object code types having different conventions for invoking program procedures and performing stack manipulations. The invention may also be used to switch between different calling conventions within a single object code type. Briefly according to the invention, a computer system comprises a routine descriptor, a stack switch frame, a mode switching mechanism for switching from a first processor, code or calling convention type to a second processor, code or calling convention type and means for executing instructions in various code type codes. A routine descriptor describes a program or code segment and its code type and calling conventions. A routine descriptor contains, among other information, a "mixed mode" field which is set to a specific, predetermined value such as a value indicating an instruction which is not legal in the runtime environment of a first processor, code or calling convention type.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: September 19, 1995
    Assignee: Apple Computer, Inc.
    Inventors: Jean-Charles D. Mourey, Sean R. Parent, Bruce K. Jones, Alan W. Lillich, Erik L. Eidt, Eric P. Traut