Patents by Inventor Eric R. Blomiley

Eric R. Blomiley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7439136
    Abstract: The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: March 29, 2007
    Date of Patent: October 21, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Cem Basceri, Eric R. Blomiley
  • Publication number: 20080233700
    Abstract: The invention includes semiconductor processing methods in which openings are formed to extend into a semiconductor substrate, and the substrate is then annealed around the openings to form cavities. The substrate is etched to expose the cavities, and the cavities are substantially filled with insulative material. The semiconductor substrate having the filled cavities therein can be utilized as a semiconductor-on-insulator-type structure, and transistor devices can be formed to be supported by the semiconductor material and to be over the cavities. In some aspects, the transistor devices have channel regions over the filled cavities, and in other aspects the transistor devices have source/drain regions over the filled cavities. The transistor devices can be incorporated into dynamic random access memory, and can be utilized in electronic systems.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 25, 2008
    Inventors: Eric R. Blomiley, Joel A. Drewes, D.V. Nirmal Ramaswamy
  • Publication number: 20080044979
    Abstract: Some embodiments include formation of at least one cavity in a first semiconductor material, followed by epitaxially growing a second semiconductor material over the first semiconductor material and bridging across the at least one cavity. The cavity may be left open, or material may be provided within the cavity. The material provided within the cavity may be suitable for forming, for example, one or more of electromagnetic radiation interaction components, transistor gates, insulative structures, and coolant structures. Some embodiments include one or more of transistor devices, electromagnetic radiation interaction components, transistor devices, coolant structures, insulative structures and gas reservoirs.
    Type: Application
    Filed: August 18, 2006
    Publication date: February 21, 2008
    Inventors: David H. Wells, Eric R. Blomiley
  • Patent number: 7276416
    Abstract: The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: October 2, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Cem Basceri, Eric R. Blomiley
  • Patent number: 7253085
    Abstract: The invention includes a method for selective deposition of semiconductor material. A substrate is placed within a reaction chamber. The substrate comprises a first surface and a second surface. The first and second surfaces are exposed to a semiconductor material precursor under conditions in which growth of semiconductor material from the precursor comprises a lag phase prior to a growth phase, and under which it takes longer for the growth phase to initiate on the second surface than on the first surface. The exposure of the first and second surfaces is conducted for a time sufficient for the growth phase to occur on the first surface, but not long enough for the growth phase to occur on the second surface.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: August 7, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Eric R. Blomiley, Gurtej S. Sandhu, Cem Basceri, Nirmal Ramaswamy
  • Publication number: 20070020876
    Abstract: The invention includes semiconductor processing methods in which openings are formed to extend into a semiconductor substrate, and the substrate is then annealed around the openings to form cavities. The substrate is etched to expose the cavities, and the cavities are substantially filled with insulative material. The semiconductor substrate having the filled cavities therein can be utilized as a semiconductor-on-insulator-type structure, and transistor devices can be formed to be supported by the semiconductor material and to be over the cavities. In some aspects, the transistor devices have channel regions over the filled cavities, and in other aspects the transistor devices have source/drain regions over the filled cavities. The transistor devices can be incorporated into dynamic random access memory, and can be utilized in electronic systems.
    Type: Application
    Filed: July 19, 2005
    Publication date: January 25, 2007
    Inventors: Eric R. Blomiley, Joel A. Drewes, D. V. Nirmal Ramaswamy
  • Patent number: 7144779
    Abstract: The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: December 5, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Cem Basceri, Eric R. Blomiley
  • Patent number: 7132355
    Abstract: This invention includes methods of forming layers comprising epitaxial silicon, and field effect transistors. In one implementation, a method of forming a layer comprising epitaxial silicon comprises epitaxially growing a silicon-comprising layer from an exposed monocrystalline material. The epitaxially grown silicon comprises at least one of carbon, germanium, and oxygen present at a total concentration of no greater than 1 atomic percent. In one implementation, the layer comprises a silicon germanium alloy comprising at least 1 atomic percent germanium, and further comprises at least one of carbon and oxygen at a total concentration of no greater than 1 atomic percent. Other aspects and implementations are contemplated.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: November 7, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Nirmal Ramaswamy, Gurtej S. Sandhu, Cem Basceri, Eric R. Blomiley
  • Patent number: 6987055
    Abstract: The invention includes a method for selective deposition of semiconductor material. A substrate is placed within a reaction chamber. The substrate comprises a first surface and a second surface. The first and second surfaces are exposed to a semiconductor material precursor under conditions in which growth of semiconductor material from the precursor comprises a lag phase prior to a growth phase, and under which it takes longer for the growth phase to initiate on the second surface than on the first surface. The exposure of the first and second surfaces is conducted for a time sufficient for the growth phase to occur on the first surface, but not long enough for the growth phase to occur on the second surface.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: January 17, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Eric R. Blomiley, Gurtej S. Sandhu, Cem Basceri, Nirmal Ramaswamy
  • Patent number: 6911367
    Abstract: The invention includes methods of forming epitaxially-grown semiconductive material having a flattened surface, and methods of incorporating such material into trenched regions and elevated/source drain regions. A method of forming epitaxially-grown semiconductive material having a flattened surface can include the following. Initially, a single crystal first semiconductor material is provided. A second semiconductive material is epitaxially grown from a surface of the first semiconductor material. The epitaxial growth is stopped, and subsequently an upper surface of the second semiconductor material is exposed to at least one hydrogen isotope to reduce curvature of (i.e., flatten) a surface of the second semiconductor material.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: June 28, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Eric R. Blomiley, Er-Xuan Ping
  • Publication number: 20040209446
    Abstract: The invention includes methods of forming epitaxially-grown semiconductive material having a flattened surface, and methods of incorporating such material into trenched regions and elevated/source drain regions. A method of forming epitaxially-grown semiconductive material having a flattened surface can include the following. Initially, a single crystal first semiconductor material is provided. A second semiconductive material is epitaxially grown from a surface of the first semiconductor material. The epitaxial growth is stopped, and subsequently an upper surface of the second semiconductor material is exposed to at least one hydrogen isotope to reduce curvature of (i.e., flatten) a surface of the second semiconductor material.
    Type: Application
    Filed: April 18, 2003
    Publication date: October 21, 2004
    Inventors: Eric R. Blomiley, Er-Xuan Ping