Abstract: This disclosure describes techniques for extending a range of bidirectional bus communications through the use of a differential signal path. The disclosed techniques include first separating the bidirectional bus into first and second unidirectional buses that transmit and receive signals, respectively, and then communicating the signals from the first and second unidirectional buses over a differential signal path. The separation of the bidirectional bus into the first and second unidirectional buses is performed using logic circuitry that blocks or permits communication between a given one of the first and second buses and the bidirectional bus based on whichever one of the first and second buses becomes dominant first. If the logic circuitry determines that the first bus becomes dominant before the second bus, the logic circuitry permits communications between the first bus and the bidirectional bus and blocks communications between the second bus and the bidirectional bus.

Abstract: An electronic circuit comprises an analog-to-digital converter (ADC) circuit. The ADC circuit includes a pre-amplifying transistor and a quantizer circuit. The pre-amplifying transistor includes a base, an emitter and a collector. The pre-amplifying transistor is configured to receive an input voltage at the base that varies logarithmically; and produce an output voltage at the collector according to a comparison of a reference voltage and a difference between the input voltage and a voltage at the emitter. The quantizer circuit is operatively coupled to the pre-amplifying transistor and is configured to generate a digital value for the input voltage using the output voltage produced by the pre-amplifying transistor.

Abstract: In some boost converter applications, an input voltage normally exceeds a regulated output voltage. The operation of the boost converter in this condition can be referred to as a pass-through operation. Using various techniques, the efficiency of a pass-through operation of a synchronous boost regulator circuit can be greatly improved. For example, a synchronous boost regulator circuit can include an input voltage VIN to output voltage VOUT voltage comparator that can accurately monitor the output voltage to detect the pass-through operation. In a pass-through operation, the high-side switch can be kept ON to maintain high efficiency, and the quiescent current of the regulator circuit can be minimized by setting portions of the control circuit into a sleep mode.

Abstract: An electronic circuit comprises an analog-to-digital converter (ADC) circuit. The ADC circuit includes a pre-amplifying transistor and a quantizer circuit. The pre-amplifying transistor includes a base, an emitter and a collector. The pre-amplifying transistor is configured to receive an input voltage at the base that varies logarithmically; and produce an output voltage at the collector according to a comparison of a reference voltage and a difference between the input voltage and a voltage at the emitter. The quantizer circuit is operatively coupled to the pre-amplifying transistor and is configured to generate a digital value for the input voltage using the output voltage produced by the pre-amplifying transistor.

Abstract: This disclosure describes techniques for extending a range of bidirectional bus communications through the use of a differential signal path. The disclosed techniques include first separating the bidirectional bus into first and second unidirectional buses that transmit and receive signals, respectively, and then communicating the signals from the first and second unidirectional buses over a differential signal path. The separation of the bidirectional bus into the first and second unidirectional buses is performed using logic circuitry that blocks or permits communication between a given one of the first and second buses and the bidirectional bus based on whichever one of the first and second buses becomes dominant first. If the logic circuitry determines that the first bus becomes dominant before the second bus, the logic circuitry permits communications between the first bus and the bidirectional bus and blocks communications between the second bus and the bidirectional bus.

Abstract: Techniques for an integrated slew-rate control circuit are provided. In certain examples, an adjustable, integrated slew-rate control circuit for a bypass transistor can provide three decades of adjustability. In an example, a slew-rate control circuit can include a load bypass transistor, a slew-rate control capacitor, electrically coupled between a conduction node of the load bypass transistor and a control node of the load bypass transistor, and a current mirror circuit. The current mirror circuit can include a sense transistor electrically coupled in series with the slew-rate control capacitor and the control node, and a mirror transistor electrically coupled between a power supply and the control node, to selectively provide, to or from the control node, a shunt current that bypasses the slew-rate control capacitor to limit a slew rate of a voltage at the conduction node.

Abstract: Protection circuitry protects a boost converter coupled between input and output nodes for driving a load coupled to the output node. The protection circuitry may comprise a first circuit configured for monitoring a voltage at the output node, the voltage being caused by a signal having a voltage proximate to, or lower than, an input voltage of the boost converter. The protection circuitry may also include a second circuit configured for coupling together the input node with respect to the output node and enabling the boost converter only if the monitored voltage exceeds a reference voltage.

Abstract: Protection circuitry protects a boost converter coupled between input and output nodes for driving a load coupled to the output node. The protection circuitry may comprise a first circuit configured for monitoring a voltage at the output node, the voltage being caused by a signal having a voltage proximate to, or lower than, an input voltage of the boost converter. The protection circuitry may also include a second circuit configured for coupling together the input node with respect to the output node and enabling the boost converter only if the monitored voltage exceeds a reference voltage.