Abstract: A method and structure for controlling the surface properties in the dielectric layers in a thin film component can be provided for improving the trimming process of thin film element. A metal fill is configured with a uniform fill pattern beneath an array of thin film resistors, and can comprise a plurality of smaller features or peaks providing a finer fill pattern that improves the control of the topology of the dielectric layers. The fill pattern can be configured in various manners, such as fill patterns parallel to the thin film resistor, fill patterns perpendicular to the thin film resistor, or fill patterns comprising a checkerboard-like configuration.

Abstract: A thin film resistor structure (75) is formed on a dielectric layer (60). A capping layer (90) is formed above said thin film resistor structure (75) and vias (110) are formed in the capping layer (90) using a two step etching process comprising of a dry etch process and a wet etch process. Conductive layers (120) are formed in the vias and form electrical contacts to the thin film resistor structure (75).

Abstract: A thin film resistor (55) is formed over an etch stop layer 40. Contact pads (65) are formed n the thin film resistor (55) and a dielectric layer (80) is formed over the thin film resistor (55). Metal structures (120 are formed above the thin film resistor (55) and metal (110) is used to fill a trench and via formed in the dielectric layer (80).

Abstract: In one embodiment, an integrated circuit includes a thin film resistor, which includes a resistor material that has been deposited on a substrate surface within a channel defined by opposing first and second portions of a stencil structure formed on the substrate surface, the resistor material having an initial width determined by a width of the channel. The stencil structure has been adapted to receive a planarizing material that protects against reduction of the initial width of the resistor material during subsequent process steps for removing the stencil structure. A head mask overlays an end portion of the thin film resistor and a dielectric overlays the head mask, the dielectric defining a via formed in the dielectric above a portion of the head mask. A conductive material has been deposited in the via, coupled to the portion of the head mask and electrically connecting the thin film resistor to other components of the integrated circuit.

Abstract: A method and structure for controlling the surface properties in the dielectric layers in a thin film component can be provided for improving the trimming process of thin film element. A metal fill is configured with a uniform fill pattern beneath an array of thin film resistors, and can comprise a plurality of smaller features or peaks providing a finer fill pattern that improves the control of the topology of the dielectric layers. The fill pattern can be configured in various manners, such as fill patterns parallel to the thin film resistor, fill patterns perpendicular to the thin film resistor, or fill patterns comprising a checkerboard-like configuration.