Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A framework is set forth herein that uses a composition mechanism to produce function data that describes a kernel. The composition mechanism may then send the function data to an execution mechanism. The execution mechanism uses the function data to dynamically execute pre-compiled code modules, which are identified by the function data. According to another aspect, the framework provides different mechanisms for implementing the kernel, depending on the native capabilities of the execution mechanism.

Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A system may include a Graphics Processing Unit (GPU) and a Field Programmable Gate Array (FPGA). The system may further include a bus interface that is external to the FPGA, and that is configured to transfer data directly between the GPU and the FPGA without storing the data in a memory of a central processing unit (CPU) as an intermediary operation.

Abstract: A framework is set forth herein that uses a composition mechanism to produce function data that describes a kernel. The composition mechanism may then send the function data to an execution mechanism. The execution mechanism uses the function data to dynamically execute pre-compiled code modules, which are identified by the function data. According to another aspect, the framework provides different mechanisms for implementing the kernel, depending on the native capabilities of the execution mechanism.

Abstract: A system is described herein that produces at least one approximate offset curve that is separated by an original curve segment So by at least a distance d, thus defining a bounding region between the original curve segment So and the approximate offset curve. The original curve segment So and the approximate offset curve both have a quadratic form. In view of this quadratic form, the system can represent the approximate offset curve in an efficient manner (e.g., using three control points). Further, the system can perform calculations with respect to the approximate offset curve in an efficient manner.

Abstract: A display apparatus described herein includes a display screen and a display processor. The display processor includes a plurality of function units that comprise functions that are representative of data that is desirably displayed on the display screen. The display processor is configured to receive configurations, compositions, and/or parameters for the plurality of function units. In addition, the display processor displays data on the display screen based at least in part upon output of the plurality of function units.

Abstract: A schedule can be generated for physically transposing an array such that when the array is transferred from a first memory type to a second memory type, the number of block transfers performed is minimized. The array can be rearranged to ensure that most or all data elements in any block read into internal memory are used before that block's internal storage is reused. The algorithm can compute an offline schedule and then execute that schedule. The method can assemble the schedule during one or more passes with an algorithm. Scheduling passes can apply a permutation to a representation of the array's structure and then tile the representation to ensure efficient use of internal memory. Tiling may alter the permutation, so the algorithm can be reinvoked and run on the tiled representation. The algorithm can be run on successively retiled representations until no additional tiling is required.

Abstract: Indirect method invocation of methods that only return constant values is optimized using fetching operations and return constant tables. Such method calls can be optimized if all possible method calls via the call site instruction return a constant value and have no side effects. Each constant return value is loaded from a return constant table, and method invocation is eliminated. If all possible target methods in a program result in a constant return value and have no side effects, an associated virtual function dispatch table (vtable) may be used as the return constant table. Furthermore, control operation optimization may be applied to identify type constraints, based on one or more possible type-dependent constant return values from an indirect method invocation. An optimizer identifies and maps between a restricted set of values and an associated restricted set of types on which execution code may operate relative to a given control operation.

Abstract: Indirect method invocation of methods that only return constant values is optimized using fetching operations and return constant tables. Such method calls can be optimized if all possible method calls via the call site instruction return a constant value and have no side effects. Each constant return value is loaded from a return constant table, and method invocation is eliminated. If all possible target methods in a program result in a constant return value and have no side effects, an associated virtual function dispatch table (vtable) may be used as the return constant table. Furthermore, control operation optimization may be applied to identify type constraints, based on one or more possible type-dependent constant return values from an indirect method invocation. An optimizer identifies and maps between a restricted set of values and an associated restricted set of types on which execution code may operate relative to a given control operation.

Abstract: A computer-implemented shading system includes a geometric renderer which renders a computer generated image to produce geometric image information for an object in a scene, and a user interface which permits a user to selectively vary a designated parameter(s) to affect how that object is shaded. The system also includes a specialized shader to shade the object in the scene according to the designated parameter(s) and other shading parameters. The specialized shader is created from the user's original shader. The specialized shader has a cache loader which contains all of the terms of the user's original shader, plus load operations to load values from computations that do not depend from the designated parameter(s). The specialized shader also has a cache reader which contains a reduced set of terms from the original shader that depend on the designated parameter(s), plus read operations to read the values of the non-variant terms from the cache.