Abstract: A system for processing semiconductor wafer storage cassettes, comprising: a vertical batch furnace assembly configured to process a semiconductor wafer storage cassette, the vertical batch furnace assembly comprising a vertical batch furnace configured to process wafers from the cassette; a floor assembly arranged at the vertical batch furnace assembly, the floor assembly comprising a two-dimensional array of electromagnets arranged below a top surface of the floor assembly, the array extending along the top surface; at least one platform assembly comprising a magnet and configured to support at least one of the cassettes thereon;, wherein the system is configured for levitating the at least one platform assembly above the top surface of the floor assembly.

Abstract: A semiconductor substrate processing apparatus is provided with a reaction chamber; a heater to heat the reaction chamber; and a substrate support assembly. The substrate support assembly comprising: a substrate support defining an outer support surface for supporting a substrate or substrate carrier in the reaction chamber; and a base assembly including a door for sealing the reaction chamber of the apparatus. The substrate support being connected to the base assembly through a bearing that facilitates rotation of the substrate support. The substrate support assembly is provided with a temperature sensor to measure the temperature of the bearing.

Abstract: Embodiments of the present invention provide a system and method for receiving and dropping-off a horizontally oriented flat substrate, for example a semiconductor wafer, on a substrate support structure and verifying the correct positioning and orientation (level) of the substrate. Additional embodiments provide a system and method for indicating the presence or absence, orientation and concavity or convexity of a substrate.

Abstract: Embodiments of the present invention provide a system and method for receiving and dropping-off a horizontally oriented flat substrate, for example a semiconductor wafer, on a substrate support structure and verifying the correct positioning and orientation (level) of the substrate. Additional embodiments provide a system and method for indicating the presence or absence, orientation and concavity or convexity of a substrate.