Patents by Inventor Eriko Nishida

Eriko Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9633892
    Abstract: A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced even if a single crystal semiconductor substrate including crystal defects is used. A first oxide film is formed on a single crystal semiconductor substrate; the first oxide film is removed; a surface of the single crystal semiconductor substrate from which the first oxide film is removed is irradiated with laser light; a second oxide film is formed on the single crystal semiconductor substrate; an embrittled region is formed in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with ions through the second oxide film; bonding the second oxide film and the semiconductor substrate so as to face each other; and the single crystal semiconductor substrate is separated at the embrittled region by heat treatment to obtain a single crystal semiconductor layer bonded to the semiconductor substrate.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: April 25, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Shunpei Yamazaki, Eriko Nishida, Takashi Shimazu
  • Patent number: 9391209
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: July 12, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Yasuyuki Arai, Satohiro Okamoto, Mari Terashima, Eriko Nishida, Junpei Sugao
  • Patent number: 8946051
    Abstract: It is an object to provide a method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced even when a single crystal semiconductor substrate in which crystal defects exist is used. Such an SOI substrate can be manufactured through the steps of forming a single crystal semiconductor layer which has an extremely small number of defects over a single crystal semiconductor substrate by an epitaxial growth method; forming an oxide film on the single crystal semiconductor substrate by thermal oxidation treatment; introducing ions into the single crystal semiconductor substrate through the oxide film; bonding the single crystal semiconductor substrate into which the ions are introduced and a semiconductor substrate to each other; causing separation by heat treatment; and performing planarization treatment on the single crystal semiconductor layer provided over the semiconductor substrate.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Eriko Nishida
  • Patent number: 8912541
    Abstract: One object of the present invention is to increase an aperture ratio of a semiconductor device. A pixel portion and a driver circuit are provided over one substrate. The first thin film transistor (TFT) in the pixel portion includes: a gate electrode layer over the substrate; a gate insulating layer over the gate electrode layer; an oxide semiconductor layer over the gate insulating layer; source and drain electrode layers over the oxide semiconductor layer; over the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, a protective insulating layer which is in contact with part of the oxide semiconductor layer; and a pixel electrode layer over the protective insulating layer. The pixel portion has light-transmitting properties. Further, a material of source and drain electrode layers of a second TFT in the driver circuit is different from a material of those of the first TFT.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Eriko Nishida
  • Publication number: 20140184484
    Abstract: To provide a novel display device where display quality does not deteriorate. The display device includes a display portion configured to display a still image at a frame frequency of 30 Hz or lower. The display portion includes a driver circuit, a plurality of wirings, and a pixel portion. The pixel portion comprises a plurality of pixels. Each of the plurality of pixels comprises a transistor, a display element, and a capacitor. A channel is formed in an oxide semiconductor layer included in the transistor. A gate of the transistor is electrically connected to one of the plurality of wirings. The driver circuit performs scanning where the plurality of wirings in one of odd-numbered rows and even-numbered rows are sequentially selected and scanning where the plurality of wirings in the other of the odd-numbered rows and the even-numbered rows are sequentially selected.
    Type: Application
    Filed: December 23, 2013
    Publication date: July 3, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki MIYAKE, Hajime KIMURA, Yasuo NAKAMURA, Eriko NISHIDA
  • Publication number: 20140014954
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.
    Type: Application
    Filed: September 12, 2013
    Publication date: January 16, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi GODO, Yasuyuki ARAI, Satohiro OKAMOTO, Mari TERASHIMA, Eriko NISHIDA, Junpei SUGAO
  • Patent number: 8546811
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: October 1, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Yasuyuki Arai, Satohiro Okamoto, Mari Terashima, Eriko Nishida, Junpei Sugao
  • Patent number: 8530332
    Abstract: An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 10, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Eriko Nishida, Takashi Shimazu
  • Patent number: 8021958
    Abstract: A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced is provided. An oxide film containing halogen is formed on each of surfaces of a single crystal semiconductor substrate and of a semiconductor substrate provided with a single crystal semiconductor layer separated from the single crystal semiconductor substrate, whereby impurities that exist on the surfaces of and inside the substrates are decreased. In addition, the single crystal semiconductor layer provided over the semiconductor substrate is irradiated with a laser beam, whereby crystallinity of the single crystal semiconductor layer is improved and planarity is improved.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: September 20, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Eriko Nishida, Takashi Shimazu
  • Publication number: 20110193081
    Abstract: An object is to provide a semiconductor device including an oxide semiconductor in which miniaturization is achieved while favorable characteristics are maintained. The semiconductor includes an oxide semiconductor layer, a source electrode and a drain electrode in contact with the oxide semiconductor layer, a gate electrode overlapping with the oxide semiconductor layer, a gate insulating layer provided between the oxide semiconductor layer and the gate electrode, and an insulating layer provided in contact with the oxide semiconductor layer. A side surface of the oxide semiconductor layer is in contact with the source electrode or the drain electrode. An upper surface of the oxide semiconductor layer overlaps with the source electrode or the drain electrode with the insulating layer interposed between the oxide semiconductor layer and the source electrode or the drain electrode.
    Type: Application
    Filed: February 1, 2011
    Publication date: August 11, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiromichi GODO, Yasuyuki ARAI, Satohiro OKAMOTO, Mari TERASHIMA, Eriko NISHIDA, Junpei SUGAO
  • Publication number: 20110031497
    Abstract: One object of the present invention is to increase an aperture ratio of a semiconductor device. A pixel portion and a driver circuit are provided over one substrate. The first thin film transistor (TFT) in the pixel portion includes: a gate electrode layer over the substrate; a gate insulating layer over the gate electrode layer; an oxide semiconductor layer over the gate insulating layer; source and drain electrode layers over the oxide semiconductor layer; over the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, a protective insulating layer which is in contact with part of the oxide semiconductor layer; and a pixel electrode layer over the protective insulating layer. The pixel portion has light-transmitting properties. Further, a material of source and drain electrode layers of a second TFT in the driver circuit is different from a material of those of the first TFT.
    Type: Application
    Filed: August 2, 2010
    Publication date: February 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Miyuki HOSOBA, Eriko NISHIDA
  • Publication number: 20090261449
    Abstract: An object is to provide an SOI substrate with excellent characteristics even in the case where a single crystal semiconductor substrate having crystal defects is used. Another object is to provide a semiconductor device using such an SOI substrate. A single crystal semiconductor layer is formed by an epitaxial growth method over a surface of a single crystal semiconductor substrate. The single crystal semiconductor layer is subjected to first thermal oxidation treatment to form a first oxide film. A surface of the first oxide film is irradiated with ions, whereby the ions are introduced to the single crystal semiconductor layer. The single crystal semiconductor layer and a base substrate are bonded with the first oxide film interposed therebetween. The single crystal semiconductor layer is divided at a region where the ions are introduced by performing thermal treatment, so that the single crystal semiconductor layer is partly left over the base substrate.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 22, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Eriko Nishida, Takashi Shimazu
  • Publication number: 20090246934
    Abstract: A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced is provided. An oxide film containing halogen is formed on each of surfaces of a single crystal semiconductor substrate and of a semiconductor substrate provided with a single crystal semiconductor layer separated from the single crystal semiconductor substrate, whereby impurities that exist on the surfaces of and inside the substrates are decreased. In addition, the single crystal semiconductor layer provided over the semiconductor substrate is irradiated with a laser beam, whereby crystallinity of the single crystal semiconductor layer is improved and planarity is improved.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 1, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Eriko NISHIDA, Takashi SHIMAZU
  • Publication number: 20090246936
    Abstract: A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced even if a single crystal semiconductor substrate including crystal defects is used. A first oxide film is formed on a single crystal semiconductor substrate; the first oxide film is removed; a surface of the single crystal semiconductor substrate from which the first oxide film is removed is irradiated with laser light; a second oxide film is formed on the single crystal semiconductor substrate; an embrittled region is formed in the single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with ions through the second oxide film; bonding the second oxide film and the semiconductor substrate so as to face each other; and the single crystal semiconductor substrate is separated at the embrittled region by heat treatment to obtain a single crystal semiconductor layer bonded to the semiconductor substrate.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 1, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Shunpei YAMAZAKI, Eriko NISHIDA, Takashi SHIMAZU
  • Publication number: 20090246937
    Abstract: It is an object to provide a method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced even when a single crystal semiconductor substrate in which crystal defects exist is used. Such an SOI substrate can be manufactured through the steps of forming a single crystal semiconductor layer which has an extremely small number of defects over a single crystal semiconductor substrate by an epitaxial growth method; forming an oxide film on the single crystal semiconductor substrate by thermal oxidation treatment; introducing ions into the single crystal semiconductor substrate through the oxide film; bonding the single crystal semiconductor substrate into which the ions are introduced and a semiconductor substrate to each other; causing separation by heat treatment; and performing planarization treatment on the single crystal semiconductor layer provided over the semiconductor substrate.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 1, 2009
    Inventors: Shunpei YAMAZAKI, Eriko NISHIDA