Abstract: Network device and associated methods are provided. The network device includes a plurality of base-ports, each base-port coupled to a plurality of network links and each base-port includes a plurality of sub-ports configured to operate as independent ports for sending and receiving information. Each network link is coupled to a smoothing first in-first out (FIFO) memory module that is used to temporarily store information at a first clock rate and information is read from the smoothing FIFO at a second clock. A sub-port can include one network link or more than one network link for receiving information from another device. A controller module monitors the smoothing FIFO for each network link to insert or delete characters from each of the smoothing FIFO based on a sub-port configuration for maintaining an order in which information is received for the sub-port.

Abstract: Method, system and network device for programming lane alignment markers are provided. The method includes configuring the first port having a plurality of sub-ports, as at least a dual lane port where each lane of the dual lane port is configured to receive and transmit frames; negotiating with the first network device to determine a lane alignment marker that is acceptable by the first network device; and programming the first port to identify the lane alignment marker associated with the vendor of the first network device for processing frames received from the first network device and transmitted to the first network device.

Abstract: Methods and systems for negotiating between a first network device and a second network device connected to a network, is provided. The method determining if a first port of the first network device having a plurality of Sub-Ports, is auto-negotiation enabled; wherein the plurality of Sub-Ports can be configured to operate independently as a port for sending and receiving information using one of a plurality of network links at a plurality of rates complying with a plurality of protocols; configuring any one or more of the Sub-Ports as one quad lane, two dual lane, one dual lane and two single lane, or four single lane ports; determining if lanes of the first port are physically swapped by identifying which one or more of the Sub-Ports will operate as a lane 0 for communicating with a particular lane 0 of the second network device; and processing auto-negotiation on all lanes.

Abstract: Method and systems for a network device are provided. The method includes receiving configuration data having a primitive sequence comprising a first primitive and a second primitive at a first clock rate at a port of the network device; writing the configuration data into a smoothing module of the port at the first clock rate; reading the configuration data out of the smoothing module at a second clock rate; allowing a primitive to be inserted or deleted in the smoothing module to prevent smoothing module underflows or overflow; regenerating the primitive sequence at the second clock rate; and transmitting the regenerated primitive sequence to the destination port.

Abstract: Method and system for processing information at a network device connected to a network is provided. The method includes receiving information conforming to a first protocol at a first clock rate at a first sub-port; receiving information conforming to a second protocol at a second clock rate at a second sub-port; storing received information in a temporary storage device at the base-port; reading information out of the temporary storage device at a third clock rate; and processing the information at a MAC module that includes logic that is time-shared among the plurality of sub-ports to process information at the third rate for both the first protocol and the second protocol. The first sub-port is granted access to the logic in a first phase and the second sub-port is granted access to the logic in a second phase for processing the information.

Abstract: Method and system for rate matching in networks is provided. The method includes setting a strobe counter of a network device equal to an initial value; and determining whether a current clock phase matches a clock phase during which a first sub-port from among a plurality of sub-ports is designated to read from a memory at a receive segment of the network device. When the current clock phase matches the designated clock phase for the first sub-port, determining if the strobe counter is equal to one of a plurality of mask values; and when the strobe counter is not equal to one of the mask values, reading data out of the memory.

Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.

Abstract: A switch element and a method for routing packets in an IB Multi Level switch and network is provided. The method includes determining if alternate routing is enabled for a packet; determining an alternate route address for the packet, if alternate routing is enabled; and routing the packet using the alternate route address, if the alternate route address is valid. The switch element includes a routing table in a port that determines a base route address; and if alternate routing is enabled for a packet, the port determines an alternate route address for a packet; and routes the packet using the alternate route address.

Abstract: A fiber channel switch element and method for routing fiber channel frames is provided. The switch element includes a receive segment that can add a virtual storage area network (“VSAN”) tagging header to frames that are received by the receive segment; and strip the VSAN tagging header before frames are sent to ports that do not support virtual fabric capability. The receive segment includes a table used for matching fabric extension parameters. An incoming frame's VSAN identity value is compared to a control word entry to generate a value used for routing the incoming frame. The table is used to determine if a frame is part of a virtual fabric. The routing table for each port is used to route frames and the routing table includes entries for supported virtual fabrics.

Abstract: A high-speed Fibre Channel switch element in a Fibre Channel network is provided. The Fibre Channel switch element includes, a rate select module that allows a port in the Fibre Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.

Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20G, 40G or at a rate greater than 40G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10G.

Abstract: A method and system for distributing credit using a fiber channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fiber channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.

Abstract: A switch element and a method for routing packets in an IB Multi Level switch and network is provided. The method includes determining if alternate routing is enabled for a packet; determining an alternate route address for the packet, if alternate routing is enabled; and routing the packet using the alternate route address, if the alternate route address is valid. The switch element includes a routing table in a port that determines a base route address; and if alternate routing is enabled for a packet, the port determines an alternate route address for a packet; and routes the packet using the alternate route address.

Abstract: A fiber channel switch element for routing fiber channel frame is provided. The switch element includes a fiber channel port that can be configured to support plural data transfer rates. The data transfer rate may be 1 G, 2 G, 4 G, 8 G or 10 G. The switch element includes a clock configuration module for providing a clock signal that is based on the data transfer rate. A receive segment of the fiber channel port sends a signal to a transmit segment to avoid an under flow condition. The receive segment also waits for a certain frame length after a fiber channel frame is written and before the fiber channel frame is read, depending upon a data transfer rate of a source port. Multiple lanes may be configured as a single 10 G multi lane port or as multiple individual ports.

Abstract: A fibre channel switch element and method for routing fibre channel frames is provided. The switch element includes a receive segment that can add a virtual storage area network (“VSAN”) tagging header to frames that are received by the receive segment; and strip the VSAN tagging header before frames are sent to ports that do not support virtual fabric capability. The receive segment includes a table used for matching fabric extension parameters. An incoming frame's VSAN identity value is compared to a control word entry to generate a value used for routing the incoming frame. The table is used to determine if a frame is part of a virtual fabric. The routing table for each port is used to route frames and the routing table includes entries for supported virtual fabrics.

Abstract: A method and system for keeping an arbitrated loop open during a frame gap using a fiber channel switch element is provided. The switch element includes a port control module having a receive and transmit segment, wherein the transmit segment activates a timer whose value determines a duration during which the arbitrated loop remains open; determines if a last frame from a sequence of frames from a source port has been transmitted; modifies the timer value if a higher priority frame for transmission is unavailable; and keeps the arbitrated loop open until the timer reaches a certain value. If a higher priority frame is available for transmission before the timer value is modified then the higher priority frame is transmitted and the timer value is re-initialized.

Abstract: Method and system for routing Fibre Channel frames is provided. The includes (a) receiving a frame at a port of a switch element; (b) determining if the frame is to be routed using extended area routing; (c) if extended area routing is to be used for routing the frame, identifying a source for obtaining extension bits for expanding an area identification field (Area_ID); and (d) expanding the Area_ID field using the extension bits from the identified source. The system includes routing logic at a port of a switch element for performing the foregoing steps.

Abstract: A method and system for distributing credit using a fibre channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fibre channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.

Abstract: A fiber channel switch element and method for routing fiber channel frames is provided. The switch element includes a receive segment that can add a virtual storage area network (“VSAN”) tagging header to frames that are received by the receive segment; and strip the VSAN tagging header before frames are sent to ports that do not support virtual fabric capability. The receive segment includes a table used for matching fabric extension parameters. An incoming frame's VSAN identity value is compared to a control word entry to generate a value used for routing the incoming frame. The table is used to determine if a frame is part of a virtual fabric. The routing table for each port is used to route frames and the routing table includes entries for supported virtual fabrics.

Abstract: Method and system for routing fiber channel frames using a fiber channel switch element is provided. The method includes, inserting a time stamp value in a fiber channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fiber channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fiber channel frame with a programmed time out value and a global counter value.