Patents by Inventor Ernest T. Lampe

Ernest T. Lampe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for filtering prefetches to provide high prefetch accuracy using less hardware
    Patent number: 6675263
    Abstract: In general, the PBVT structure provides an effective method of filtering a stream of hardware generated prefetches by eliminating prefetch addresses that have proven to be inaccurate in the past. When compared to a design that uses a PFB of equal number of entries, the PBVT along with a small PFB provides virtually equivalent prefetch accuracy and miss rate reduction while using much less hardware area (97% less data storage space for a 1024-entry PFB case).
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: January 6, 2004
    Assignee: Intel Corporation
    Inventors: James R. Anderson, Jeff J. Baxter, Ernest T. Lampe
  • Method and apparatus for filtering prefetches to provide high prefetch accuracy using less hardware
    Publication number: 20030018857
    Abstract: In general, the PBVT structure provides an effective method of filtering a stream of hardware generated prefetches by eliminating prefetch addresses that have proven to be inaccurate in the past. When compared to a design that uses a PFB of equal number of entries, the PBVT along with a small PFB provides virtually equivalent prefetch accuracy and miss rate reduction while using much less hardware area (97% less data storage space for a 1024-entry PFB case).
    Type: Application
    Filed: August 27, 2002
    Publication date: January 23, 2003
    Inventors: James R. Anderson, Jeff J. Baxter, Ernest T. Lampe
  • Method and apparatus for filtering prefetches to provide high prefetch accuracy using less hardware
    Patent number: 6480939
    Abstract: In general, the PBVT structure provides an effective method of filtering a stream of hardware generated prefetches by eliminating prefetch addresses that have proven to be inaccurate in the past. When compared to a design that uses a PFB of equal number of entries, the PBVT along with a small PFB provides virtually equivalent prefetch accuracy and miss rate reduction while using much less hardware area (97% less data storage space for a 1024-entry PFB case).
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: November 12, 2002
    Assignee: Intel Corporation
    Inventors: James R. Anderson, Jeff J. Baxter, Ernest T. Lampe
  • Method and apparatus for filtering prefetches to provide high prefetch accuracy using less hardware
    Publication number: 20020129205
    Abstract: In general, the PBVT structure provides an effective method of filtering a stream of hardware generated prefetches by eliminating prefetch addresses that have proven to be inaccurate in the past. When compared to a design that uses a PFB of equal number of entries, the PBVT along with a small PFB provides virtually equivalent prefetch accuracy and miss rate reduction while using much less hardware area (97% less data storage space for a 1024-entry PFB case).
    Type: Application
    Filed: December 29, 2000
    Publication date: September 12, 2002
    Inventors: James R. Anderson, Jeff J. Baxter, Ernest T. Lampe