Patents by Inventor Ernie Schirmann

Ernie Schirmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8923167
    Abstract: A communication device reduces intermodulation interference in a simultaneous transmitter using a notch diplexing arrangement. The communication device has a radio front-end module with more than one transceiver for simultaneous transmission with opposing transmit (Tx) band notch filters in series with each duplexer output, and phase rotations into and out of the notch filters suitable for diplexing at the notch filter outputs.
    Type: Grant
    Filed: September 27, 2011
    Date of Patent: December 30, 2014
    Assignee: Google Technology Holdings LLC
    Inventors: Gregory R. Black, Ryan J. Goedken, Thomas D. Nagode, Ernie Schirmann, Lawrence R. Schumacher
  • Publication number: 20130077540
    Abstract: A communication device reduces intermodulation interference in a simultaneous transmitter using a notch diplexing arrangement. The communication device has a radio front-end module with more than one transceiver for simultaneous transmission with opposing transmit (Tx) band notch filters in series with each duplexer output, and phase rotations into and out of the notch filters suitable for diplexing at the notch filter outputs.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 28, 2013
    Applicant: MOTOROLA MOBILITY, INC.
    Inventors: Gregory R. Black, Ryan J. Goedken, Thomas D. Nagode, Ernie Schirmann, Lawrence R. Schumacher
  • Patent number: 5733827
    Abstract: A method of fabricating semiconductor devices with a passivated surface includes providing first cap and etch stop layers and second cap and etch stop layers with a contact layer thereon so as to define an inter-electrode surface area. A first layer and an insulating layer, which are selectively etchable relative to each other, are deposited on the contact layer and the inter-electrode surface area. The insulating layer and the first layer are individually etched to define an electrode contact area and to expose the inter-electrode surface area. Portions of the first etch stop and cap layers remaining in the contact area are selectively removed and a metal contact is formed in the contact area in abutting engagement with the insulating layer so as to seal the inter-electrode surface area.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: March 31, 1998
    Assignee: Motorola, Inc.
    Inventors: Saied N. Tehrani, Mark Durlam, Marino J. Martinez, Jenn-Hwa Huang, Ernie Schirmann
  • Patent number: 5719088
    Abstract: A method of fabricating semiconductor devices with a passivated surface includes providing a contact layer on a substrate so as to define an inter-electrode surface area. A first layer and an insulating layer, which are selectively etchable relative to each other and to the substrate and the contact layer, are deposited on the contact layer and the inter-electrode surface area. The insulating layer and the first layer are individually and selectively etched to define an electrode contact area and to expose the inter-electrode surface area. The exposed inter-electrode surface area is passivated, either subsequent to or during the etching of the first layer. A metal contact is formed in the electrode contact area in abutting engagement with the insulating layer so as to seal the inter-electrode surface area.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: February 17, 1998
    Assignee: Motorola, Inc.
    Inventors: Jenn-Hwa Huang, Mark Durlam, Marino J. Martinez, Ernie Schirmann, Saied N. Tehrani, William J. Ooms