Patents by Inventor Ernst H. Young, Jr.

Ernst H. Young, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4317051
    Abstract: A clock generator (buffer) circuit, which consists of an inverter stage, three serially connected field effect transistors, a bootstrap capacitor, a delay element, and two totem pole stages, has good response time and is useful with many of today's static random access memories. The transistors used are enhancement and depletion mode insulated gate field effect transistors.
    Type: Grant
    Filed: October 9, 1979
    Date of Patent: February 23, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Ernst H. Young, Jr.
  • Patent number: 4309630
    Abstract: Buffer circuitry, which uses enhancement and depletion mode field effect transistors, has relatively high speed operation, low power dissipation, and requires a relatively modest amount of silicon area for implementation.
    Type: Grant
    Filed: December 10, 1979
    Date of Patent: January 5, 1982
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventor: Ernst H. Young, Jr.
  • Patent number: 4253163
    Abstract: A latching type of sense amplifier, which uses depletion mode transistors as resistive load elements, a pair of enhancement mode field effect transistors as input devices, two other pairs of enhancement mode field effect transistors, and, in addition, a cross-coupled pair of enhancement mode field effect transistors, provides relatively high sensitivity and fast latching time essentially independent of input and output capacitive loading.
    Type: Grant
    Filed: October 9, 1979
    Date of Patent: February 24, 1981
    Assignee: Bell Telephone Laboratories, Incorporated
    Inventors: Goh Komoriya, Ernst H. Young, Jr.