Patents by Inventor Erumu Kikuchi

Erumu Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9748401
    Abstract: Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: ?1 and ?2, ?1<?2 is satisfied, and ?2 is 300 seconds or less. In addition, a semiconductor device including the transistor is manufactured.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: August 29, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Takayuki Inoue, Suzunosuke Hiraishi, Erumu Kikuchi, Hiromichi Godo, Shuhei Yoshitomi, Koki Inoue, Akiharu Miyanaga, Shunpei Yamazaki
  • Patent number: 9601633
    Abstract: An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time ?1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: March 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Inoue, Masashi Tsubuku, Suzunosuke Hiraishi, Junichiro Sakata, Erumu Kikuchi, Hiromichi Godo, Akiharu Miyanaga, Shunpei Yamazaki
  • Patent number: 9577107
    Abstract: To improve crystallinity of an oxide semiconductor. To provide a crystalline oxide semiconductor film in which a crystallized region extends to the interface with a base or the vicinity of the interface, and to provide a method for forming the oxide semiconductor film. An oxide semiconductor film containing indium, gallium, and zinc is formed, and the oxide semiconductor film is irradiated with an energy beam, thereby being heated. Note that the oxide semiconductor film includes a c-axis aligned crystal region or microcrystal.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: February 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Takahisa Ishiyama, Masaki Koyama, Erumu Kikuchi, Takuya Hirohashi, Masashi Oota
  • Patent number: 9159793
    Abstract: An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (MoOy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide. For example, a semiconductor device is formed using a molybdenum oxide material containing molybdenum trioxide (MoO3) as its main component and MoOy (2<y<3) at 4% or more.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: October 13, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshinobu Asami, Riho Kataishi, Erumu Kikuchi
  • Publication number: 20150069393
    Abstract: Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: ?1 and ?2, ?1<?2 is satisfied, and ?2 is 300 seconds or less. In addition, a semiconductor device including the transistor is manufactured.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 12, 2015
    Inventors: Masashi TSUBUKU, Takayuki INOUE, Suzunosuke HIRAISHI, Erumu KIKUCHI, Hiromichi GODO, Shuhei YOSHITOMI, Koki INOUE, Akiharu MIYANAGA, Shunpei YAMAZAKI
  • Patent number: 8951894
    Abstract: A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takayuki Inoue, Erumu Kikuchi, Hiroto Inoue
  • Publication number: 20150001535
    Abstract: An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (MoOy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide. For example, a semiconductor device is formed using a molybdenum oxide material containing molybdenum trioxide (MoO3) as its main component and MoOy (2<y<3) at 4% or more.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 1, 2015
    Inventors: Yoshinobu Asami, Riho KATAISHI, Erumu KIKUCHI
  • Patent number: 8895976
    Abstract: Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: ?1 and ?2, ?1<?2 is satisfied, and ?2 is 300 seconds or less. In addition, a semiconductor device including the transistor is manufactured.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Takayuki Inoue, Suzunosuke Hiraishi, Erumu Kikuchi, Hiromichi Godo, Shuhei Yoshitomi, Koki Inoue, Akiharu Miyanaga, Shunpei Yamazaki
  • Publication number: 20140319519
    Abstract: An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time ?1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Inventors: Takayuki Inoue, Masashi Tsubuku, Suzunosuke Hiraishi, Junichiro Sakata, Erumu Kikuchi, Hiromichi Godo, Akiharu Miyanaga, Shunpei Yamazaki
  • Patent number: 8847482
    Abstract: To provide a display device with higher image quality and reliability or a large-sized display device with a large screen at low cost with high productivity. A function layer (such as a coloring layer or a pixel electrode layer) used in the display device is formed by discharging a liquid function-layer-forming material to an opening formed with a layer including a first organic compound which has a C—N bond or a C—O bond in the main chain as a base and a layer including a second organic compound as a partition. The fluorine density exhibiting liquid repellency to the liquid function-layer-forming material, which is attached to a surface of the layers including organic compounds, is controlled, whereby a liquid repellent region and a lyophilic region can be selectively formed.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Erika Takahashi, Erumu Kikuchi, Sachiko Kawakami
  • Publication number: 20140284597
    Abstract: To improve crystallinity of an oxide semiconductor. To provide a crystalline oxide semiconductor film in which a crystallized region extends to the interface with a base or the vicinity of the interface, and to provide a method for forming the oxide semiconductor film. An oxide semiconductor film containing indium, gallium, and zinc is formed, and the oxide semiconductor film is irradiated with an energy beam, thereby being heated. Note that the oxide semiconductor film includes a c-axis aligned crystal region or microcrystal.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 25, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa SHIMOMURA, Takahisa ISHIYAMA, Masaki KOYAMA, Erumu KIKUCHI, Takuya HIROHASHI, Masashi OOTA
  • Patent number: 8772770
    Abstract: An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (MoOy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide. For example, a semiconductor device is formed using a molybdenum oxide material containing molybdenum trioxide (MoO3) as its main component and MoOy (2<y<3) at 4% or more.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: July 8, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshinobu Asami, Riho Kataishi, Erumu Kikuchi
  • Publication number: 20130012006
    Abstract: A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Takayuki INOUE, Erumu KIKUCHI, Hiroto INOUE
  • Patent number: 8258025
    Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Yasuyuki Arai, Takayuki Inoue, Erumu Kikuchi
  • Publication number: 20120091444
    Abstract: To provide a display device with higher image quality and reliability or a large-sized display device with a large screen at low cost with high productivity. A function layer (such as a coloring layer or a pixel electrode layer) used in the display device is formed by discharging a liquid function-layer-forming material to an opening formed with a layer including a first organic compound which has a C—N bond or a C—O bond in the main chain as a base and a layer including a second organic compound as a partition. The fluorine density exhibiting liquid repellency to the liquid function-layer-forming material, which is attached to a surface of the layers including organic compounds, is controlled, whereby a liquid repellent region and a lyophilic region can be selectively formed.
    Type: Application
    Filed: December 21, 2011
    Publication date: April 19, 2012
    Inventors: Gen Fujii, Erika Takahashi, Erumu Kikuchi, Sachiko Kawakami
  • Publication number: 20120056101
    Abstract: When hydrogen is introduced into a plasma chamber which includes the dielectric plate as part of an exterior wall, and surface waves are generated on the dielectric plate using microwaves, a region where negative hydrogen ions are easily generated is formed in the plasma chamber. Since only hydrogen negative ions each with a molecular weight of 1 are generated, only ions with the same mass can be added to an object by application of an electric field, without mass separation.
    Type: Application
    Filed: August 26, 2011
    Publication date: March 8, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Erumu KIKUCHI, Wataru SEKINE
  • Publication number: 20110315979
    Abstract: Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: ?1 and ?2, ?1<?2 is satisfied, and ?2 is 300 seconds or less. In addition, a semiconductor device including the transistor is manufactured.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masashi Tsubuku, Takayuki Inoue, Suzunosuke Hiraishi, Erumu Kikuchi, Hiromichi Godo, Shuhei Yoshitomi, Koki Inoue, Akiharu Miyanaga, Shunpei Yamazaki
  • Patent number: 8083956
    Abstract: To provide a display device with higher image quality and reliability or a large-sized display device with a large screen at low cost with high productivity. A function layer (such as a coloring layer or a pixel electrode layer) used in the display device is formed by discharging a liquid function-layer-forming material to an opening formed with a layer including a first organic compound which has a C—N bond or a C—O bond in the main chain as a base and a layer including a second organic compound as a partition. The fluorine density exhibiting liquid repellency to the liquid function-layer-forming material, which is attached to a surface of the layers including organic compounds, is controlled, whereby a liquid repellent region and a lyophilic region can be selectively formed.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: December 27, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Gen Fujii, Erika Takahashi, Erumu Kikuchi, Sachiko Kawakami
  • Publication number: 20110227082
    Abstract: An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time ?1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki Inoue, Masashi Tsubuku, Suzunosuke Hiraishi, Junichiro Sakata, Erumu Kikuchi, Hiromichi Godo, Akiharu Miyanaga, Shunpei Yamazaki
  • Publication number: 20110039402
    Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.
    Type: Application
    Filed: August 2, 2010
    Publication date: February 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yukie SUZUKI, Yasuyuki ARAI, Takayuki INOUE, Erumu KIKUCHI