Patents by Inventor Erwin F. Pfeffer

Erwin F. Pfeffer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7197601
    Abstract: Selected units of storage, such as segments of storage or regions of storage, may be invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure entries corresponding to the units of storage to be invalidated. Additionally, buffer entries associated with the invalidated units of storage or other chosen units of storage may be cleared. An instruction is provided to perform the invalidation and clearing. The instruction can be implemented by software emulation, hardware, firmware or some combination thereof.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: March 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Lisa C. Heller, Erwin F. Pfeffer, Kenneth E. Plambeck
  • Patent number: 7020761
    Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that address translation is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of page indices, which indicates whether the address translation can continue. If address translation can continue, the restriction is ignored. The processing unit includes a processor or a pageable entity, as examples.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: March 28, 2006
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Siegel, Bruce A. Wagar, Ute Gaertner, Lisa C. Heller, Erwin F. Pfeffer
  • Patent number: 6996698
    Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that fetching of storage keys is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of addresses, which indicates whether the fetching can continue. If fetching can continue, the restriction is ignored.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: February 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Jane H. Bartik, Lisa C. Heller, Erwin F. Pfeffer, Ute Gaertner
  • Publication number: 20040230758
    Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that fetching of storage keys is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of addresses, which indicates whether the fetching can continue. If fetching can continue, the restriction is ignored.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Jane H. Bartik, Lisa C. Heller, Erwin F. Pfeffer, Ute Gaertner
  • Publication number: 20040230749
    Abstract: Selected units of storage, such as segments of storage or regions of storage, are invalidated. The invalidation is facilitated by the setting of invalidation indicators located in data structure entries corresponding to the units of storage to be invalidated. Additionally, buffer entries associated with the invalidated units of storage or other chosen units of storage are cleared. An instruction is provided to perform the invalidation and/or clearing. Moreover, buffer entries associated with a particular address space are cleared, without any invalidation. This is also performed by the instruction. The instruction can be implemented in software, hardware, firmware or some combination thereof, or it can be emulated.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Lisa C. Heller, Erwin F. Pfeffer, Kenneth E. Plambeck
  • Publication number: 20040230768
    Abstract: Processing restrictions of a computing environment are filtered and blocked, in certain circumstances, such that processing continues despite the restrictions. One restriction includes an indication that address translation is prohibited, in response to a buffer miss. When a processing unit of the computing environment is met with this restriction, it performs a comparison of page indices, which indicates whether the address translation can continue. If address translation can continue, the restriction is ignored. The processing unit includes a processor or a pageable entity, as examples.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Bruce A. Wagar, Ute Gaertner, Lisa C. Heller, Erwin F. Pfeffer
  • Publication number: 20040230976
    Abstract: Processing within a computing environment is facilitated by filtering requests of the computing environment. A processing unit that receives a request determines whether it is to perform the request. This determination is made by, for instance, comparing an identifier of the request with an identifier of the processing unit making the determination. If there is a mismatch, then the request is blocked. Other processing within the computing environment is also facilitated by selectively using buffer entries. The selection criteria is based, for instance, on identifier information.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Slegel, Lisa C. Heller, Erwin F. Pfeffer, Ute Gaertner