Patents by Inventor Etsurou Morita

Etsurou Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8284395
    Abstract: A wafer surface measuring apparatus which measures a surface of the wafer by irradiating a laser beam on a wafer comprising a measuring stage that supports the outer edge of the wafer and loads the wafer in a manner not contacting the rear surface of the wafer and the stage surface, a wafer carrying means that moves the wafer over the measuring stage and loads the wafer on the measuring stage from an upward side, a rotary drive unit which rotates the measuring stage, and an ejection hole formed at a center portion of the stage surface to supply gas to a rear surface of the wafer loaded on the measuring stage. The wafer carrying means includes a chuck which sucks and holds the surface of the wafer in a non-contact manner and bends the wafer in an upwardly convex shape.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: October 9, 2012
    Assignee: Sumco Corporation
    Inventors: Eiji Kamiyama, Etsurou Morita
  • Patent number: 8110486
    Abstract: A semiconductor wafer is produced at a step of forming a lattice relaxation or a partly lattice-relaxed strain relaxation SiGe layer on an insulating layer in a SOI wafer comprising an insulating layer and a SOI layer, wherein at least an upper layer side portion of the SiGe layer is formed on the SOI layer at a gradient of Ge concentration gradually decreasing toward the surface and then subjected to a heat treatment in an oxidizing atmosphere.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: February 7, 2012
    Assignee: Sumco Corporation
    Inventors: Koji Matsumoto, Tomoyuki Hora, Akihiko Endo, Etsurou Morita, Masaharu Ninomiya
  • Patent number: 8048769
    Abstract: There is provided a bonded wafer having excellent thickness uniformity after thinning but also good surface roughness and being less in defects. In the production method of a bonded wafer by bonding a wafer for active layer to a wafer for support substrate and thinning the wafer for active layer, oxygen ions are implanted into the wafer for active layer to form an oxygen ion implanted layer in the active layer and thereafter a heat treatment is carried out in a non-oxidizing atmosphere at a temperature of not lower than 1100° C., and an oxide film formed on the exposed surface of the oxygen ion implanted layer is removed and then a heat treatment is carried out in a non-oxidizing atmosphere at a temperature of not higher than 1100° C.
    Type: Grant
    Filed: July 4, 2007
    Date of Patent: November 1, 2011
    Assignee: Sumco Corporation
    Inventors: Nobuyuki Morimoto, Akihiko Endo, Etsurou Morita
  • Patent number: 7960225
    Abstract: The thickness of a semiconductor wafer layer, extending from a mirror-finished surface thereof to a solid-state image sensing device, is measured. Based on the residual thickness data, plasma etching is performed from the mirror-finished surface until a predetermined thickness is reached by controlling the plasma etching amount. By doing this, it is possible to reduce variation in the thickness of the solid-state image sensing device at low cost without causing an increase in the number of processes.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: June 14, 2011
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Akihiko Endo, Yoshihisa Nonogaki, Hideki Nishihata
  • Publication number: 20110136267
    Abstract: The thickness of a semiconductor wafer layer, extending from a mirror-finished surface thereof to a solid-state image sensing device, is measured. Based on the residual thickness data, plasma etching is performed from the mirror-finished surface until a predetermined thickness is reached by controlling the plasma etching amount. By doing this, it is possible to reduce variation in the thickness of the solid-state image sensing device at low cost without causing an increase in the number of processes.
    Type: Application
    Filed: August 27, 2010
    Publication date: June 9, 2011
    Applicant: SUMCO CORPORATION
    Inventors: Etsurou MORITA, Akihiko ENDO, Yoshihisa NONOGAKI, Hideki NISHIHATA
  • Patent number: 7951716
    Abstract: A wafer is produced at a step of polishing a predetermined face of a wafer to flatten the predetermined face while supplying a polishing liquid onto a bonded abrasive cloth, wherein the bonded abrasive cloth comprises a urethane bonding material consisting of a soft segment having a polyfunctional isocyanate and a hard segment having a polyfunctional polyol and having an expansion ratio of 1.1-4 times and silica having an average particle size of 0.2-10 ?m and a hydroxy group, and has a given ratio of the hard segment occupied in the urethane bonding material, a given volume ratio of silica and a given Shore D hardness.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: May 31, 2011
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Kazuo Hujie, Isoroku Ono
  • Patent number: 7855129
    Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: December 21, 2010
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Shinji Okawa, Isoroku Ono
  • Patent number: 7829436
    Abstract: A processing time required for regeneration of a layer transferred wafer is reduced and the regeneration cost is lowered, while a removal amount at the regeneration is decreased the number of regeneration times is increased. A main surface of a semiconductor wafer (13) has a main flat portion (13d) and a chamfered portion (13c) formed in the periphery of the main flat portion (13d), an ion implanted area (13b) is formed by implanting ions only into the main flat portion (13d), a laminated body (16) is formed by laminating the main flat portion (13d) on a main surface of a support wafer (14), and moreover, the semiconductor wafer (13) is separated from a thin layer (17) in the ion implanted area (13b) by heat treatment at a predetermined temperature so as to obtain a thick layer transferred wafer (12), which is to be regenerated.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: November 9, 2010
    Assignee: SUMCO Corporation
    Inventors: Etsurou Morita, Shinji Okawa, Isoroku Ono
  • Publication number: 20100219500
    Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
    Type: Application
    Filed: May 12, 2010
    Publication date: September 2, 2010
    Applicant: SUMCO CORPORATION
    Inventors: Etsurou MORITA, Shinji Okawa, Isoroku Ono
  • Patent number: 7781309
    Abstract: A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: August 24, 2010
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Shinji Okawa, Isoroku Ono
  • Publication number: 20100201976
    Abstract: A wafer surface measuring apparatus which measures a surface of the wafer by irradiating a laser beam on a wafer comprising a measuring stage that supports the outer edge of the wafer and loads the wafer in a manner not contacting the rear surface of the wafer and the stage surface, a wafer carrying means that moves the wafer over the measuring stage and loads the wafer on the measuring stage from an upward side, a rotary drive unit which rotates the measuring stage, and an ejection hole formed at a center portion of the stage surface to supply gas to a rear surface of the wafer loaded on the measuring stage. The wafer carrying means includes a chuck which sucks and holds the surface of the wafer in a non-contact manner and bends the wafer in an upwardly convex shape.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 12, 2010
    Applicant: SUMCO CORPORATION
    Inventors: Eiji KAMIYAMA, Etsurou MORITA
  • Patent number: 7736998
    Abstract: This SOI substrate includes a base substrate which includes a single-crystal semiconductor and an active layer which includes a single-crystal semiconductor and is bonded to the base substrate with an oxide film therebetween. The oxide film is formed only in the active layer. The active layer is formed with a thickness of 10 to 200 nm and a thickness variation throughout the active layer of 1.5 nm or less by etching a surface of the active layer while selectively using only the reactive radicals generated by a plasma etching process.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: June 15, 2010
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Ritarou Sano, Akihiko Endo
  • Patent number: 7718507
    Abstract: A bonded wafer is produced by bonding an ion-implanted wafer for an active layer onto a wafer for a supporting substrate, and thereafter exfoliating the wafer for the active layer at the ion-implanted position through a heat treatment and then polishing a terrace portion of the resulting active layer with a predetermined fixed grain abrasive cloth to remove island-shaped projections on the terrace portion while controlling a scattering of terrace width and smoothness of an outer peripheral face of the active layer.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: May 18, 2010
    Assignee: Sumco Corporation
    Inventors: Etsurou Morita, Kazuo Hujie, Isoroku Ono
  • Publication number: 20100015779
    Abstract: There is provided a bonded wafer having excellent thickness uniformity after thinning but also good surface roughness and being less in defects. In the production method of a bonded wafer by bonding a wafer for active layer to a wafer for support substrate and thinning the wafer for active layer, oxygen ions are implanted into the wafer for active layer to form an oxygen ion implanted layer in the active layer and thereafter a heat treatment is carried out in a non-oxidizing atmosphere at a temperature of not lower than 1100° C., and an oxide film formed on the exposed surface of the oxygen ion implanted layer is removed and then a heat treatment is carried out in a non-oxidizing atmosphere at a temperature of not higher than 1100° C.
    Type: Application
    Filed: July 4, 2007
    Publication date: January 21, 2010
    Applicant: Sumco Corporation
    Inventors: Nobuyuki Morimoto, Akihiko Endo, Etsurou Morita
  • Patent number: 7416960
    Abstract: The object of the invention is to provide a method for manufacturing an SOI layer which is devoid of damages, has a reduced variation in thickness, and is uniform in thickness.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: August 26, 2008
    Assignee: Sumco Corporation
    Inventors: Akihiko Endo, Tatsumi Kusaba, Hidehiko Okuda, Etsurou Morita
  • Patent number: 7364984
    Abstract: The object of the invention is to provide a method for manufacturing an SOI layer which is devoid of damages, has a reduced variation in thickness, and is uniform in thickness.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: April 29, 2008
    Assignee: Sumco Corporation
    Inventors: Akihiko Endo, Tatsumi Kusaba, Hidehiko Okuda, Etsurou Morita
  • Patent number: 7354844
    Abstract: The object of the invention is to provide a method for manufacturing an SOI layer which is devoid of damages, has a reduced variation in thickness, and is uniform in thickness.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: April 8, 2008
    Assignee: Sumco Corporation
    Inventors: Akihiko Endo, Tatsumi Kusaba, Hidehiko Okuda, Etsurou Morita
  • Publication number: 20080063840
    Abstract: This SOI substrate includes a base substrate which includes a single-crystal semiconductor and an active layer which includes a single-crystal semiconductor and is bonded to the base substrate with an oxide film therebetween. The oxide film is formed only in the active layer. The active layer is formed with a thickness of 10 to 200 nm and a thickness variation throughout the active layer of 1.5 nm or less by etching a surface of the active layer while selectively using only the reactive radicals generated by a plasma etching process.
    Type: Application
    Filed: May 25, 2005
    Publication date: March 13, 2008
    Inventors: Etsurou Morita, Ritarou Sano, Akihiko Endo
  • Publication number: 20080014717
    Abstract: The object of the invention is to provide a method for manufacturing an SOI layer which is devoid of damages, has a reduced variation in thickness, and is uniform in thickness.
    Type: Application
    Filed: September 14, 2007
    Publication date: January 17, 2008
    Inventors: Akihiko Endo, Tatsumi Kusaba, Hidehiko Okuda, Etsurou Morita
  • Publication number: 20080014716
    Abstract: The object of the invention is to provide a method for manufacturing an SOI layer which is devoid of damages, has a reduced variation in thickness, and is uniform in thickness.
    Type: Application
    Filed: September 14, 2007
    Publication date: January 17, 2008
    Inventors: Akihiko Endo, Tatsumi Kusaba, Hidehiko Okuda, Etsurou Morita