Abstract: A system and method for increasing the performance of a flash-based storage system, using specialized flash memory controller(s). Several methods of performance improvement are suggested such as adding DMA capability to flash memory controller to reduce the data transfer time; connecting flash chips to a multitude of flash memory controllers, which allow continuation of the data transfer to the system, even after the page programming operation has started; and connecting flash chips to a multitude of DMA-capable flash memory controllers to allow data transfer directly from one flash chip to another. In addition, a multi-controller design is suggested, which efficiently combines these performance-improving methods. In its best mode of operation, the present invention is a Flash-based storage system with several flash controllers or a multi-controller with DMA interface, organized in a way that reduces the page programming, page fetch and page copy time.

Abstract: A method and system for increasing read and write performance of flash-based storage systems, by using RAM buffers with multiple accesses. The increase of read and write performance of flash-based storage system is achieved by performing “from RAM” and “to RAM” transfer operations simultaneously. According to the preferred embodiment of the present invention, the invention provides a system for enabling simultaneous data transfer from a host interface to flash media and from flash media to a host interface. It also provides for a system for synchronizing memory-to-host and flash-to-memory transfers, during the host read operation. There is further provided a system of synchronizing host-to-memory and memory-to-flash transfers, during the host write operation.

Abstract: A system and method for simplifying the testing and manufacturing process of multi-board solid-state storage systems. The system is constructed by placing secondary non-volatile memory components onto every board in multi-board system that carries primary solid-state components. This allows separate or independent testing of the boards, and final construction of the solid-state system by simply connecting these boards, without the need to either test the completely constructed system or to transfer geometry, faulty location and auxiliary records if the boards have been tested independently.