Patents by Inventor Eun Kyoung Choi

Eun Kyoung Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140299980
    Abstract: Semiconductor packages including a heat spreader and methods of forming the same are provided. The semiconductor packages may include a first semiconductor chip, a second semiconductor chip, and a heat spreader stacked sequentially. The semiconductor packages may also include a thermal interface material (TIM) layer surrounding the second semiconductor chip and directly contacting a sidewall of the second semiconductor chip. An upper surface of the TIM layer may directly contact a lower surface of the heat spreader, and a sidewall of the TIM layer may be substantially coplanar with a sidewall of the heat spreader. In some embodiments, a sidewall of the first semiconductor chip may be substantially coplanar with the sidewall of the TIM layer.
    Type: Application
    Filed: January 21, 2014
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eun-Kyoung Choi, Jong-Youn Kim, Sang-Wook Park, Hae-Jung Yu, In-Young Lee, Sang-Uk Han, Ji-Seok Hong
  • Publication number: 20140271596
    Abstract: The present invention relates to an emulsified hydrogel composition and to a production method therefor, wherein, by incorporating between 20 and 30 percent by weight of a gelling solution and an emulsion obtained by mixing between 45 and 60 percent by weight of an aqueous component and between 15 and 30 percent by weight of an oil component, it is possible to simultaneously provide the skin with an aqueous fraction and an oil fraction, and it is possible to enhance functionality due to the inclusion of a high content of a dermatologically active component dissolved in the oil component.
    Type: Application
    Filed: September 12, 2012
    Publication date: September 18, 2014
    Applicant: GENIC CO., LTD.
    Inventors: Sung Jang Kim, Hyong-ii Park, Jae Han Cho, Eun Kyoung Choi, Jae hoon Kwak, Jae Min Lim, Hyun Jun Lim, Jai Hyun Kim, Min Seok Kim, Jin A. Yang, Hyun Oh Yoo, Jong Chul Kim
  • Publication number: 20140239536
    Abstract: A hydrogel composition includes 0.1 to 10 wt % of a cross-linking agent, 0.2 to 6 wt % of a gelling polymer, 0.5 to 20 wt % of a polyhydric alcohol, and 70 to 90 wt % of purified water to maintain a form without a supporter, be stable without fluidization even when a hydrogel is immersed in cosmetics or pharmaceuticals, and allow the cosmetics or the pharmaceuticals to be uniformly delivered to skin.
    Type: Application
    Filed: September 12, 2012
    Publication date: August 28, 2014
    Applicant: GENIC CO., LTD.
    Inventors: Hyun Oh Yoo, Jong Chul Kim, Jin A. Yang, Eun Kyoung Choi, Jae Min Lim
  • Publication number: 20140239478
    Abstract: A semiconductor device includes a first semiconductor chip at least partially overlapping a second semiconductor chip. The first semiconductor chip is coupled to a substrate and has a first width, and the second semiconductor chip has a second width. The device also includes a heat sink coupled to the second semiconductor chip and having a third width different from at least one of the first width or the second width. A package molding section at least partially overlaps a first area of the heat sink and does not overlap a second area of the heat sink which includes a top surface of the heat sink.
    Type: Application
    Filed: March 14, 2013
    Publication date: August 28, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ji-Seok HONG, Sang-Uk HAN, Eun-Kyoung CHOI, Jong-Youn KIM, Hae-Jung YU, Cha-Jea JO
  • Patent number: 8816509
    Abstract: A semiconductor package includes first and second semiconductor elements electrically interconnected by a connection structure. The first and second semiconductor elements are joined by a protection structure that includes an adhesive layer surrounded by a retention layer.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: August 26, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Seok Hong, Kwang-chul Choi, Sangwon Kim, Hyun-Jung Song, Eun-Kyoung Choi
  • Patent number: 8791562
    Abstract: A stack package usable in a three-dimensional (3D) system-in-package (SIP) includes a first semiconductor chip, a second semiconductor chip, and a supporter. The first semiconductor chip includes a through silicon via (TSV), and the second semiconductor chip is stacked on the first semiconductor chip and is electrically connected to the first semiconductor chip through the TSV of the first semiconductor chip. The supporter is attached onto the first semiconductor chip so as to be spaced apart from an edge of the second semiconductor chip.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: July 29, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Chung-sun Lee, Jung-Hwan Kim, Yun-hyeok Im, Ji-hwan Hwang, Hyon-chol Kim, Kwang-chul Choi, Eun-kyoung Choi, Tae-hong Min
  • Patent number: 8759147
    Abstract: Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
    Type: Grant
    Filed: September 17, 2011
    Date of Patent: June 24, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Kyoung Choi, SeYoung Jeong, Kwang-chul Choi, Tae Hong Min, Chungsun Lee, Jung-Hwan Kim
  • Publication number: 20130344627
    Abstract: A method of fabricating a wafer level package includes preparing a wafer including a plurality of first semiconductor chips, mounting a plurality of second semiconductor chips on the wafer, disposing the wafer on a lower mold and disposing an upper mold so as to surround edges of a top surface of the wafer, dispensing a molding member on the wafer, and pressurizing the molding member by using a plunger so as to fabricate a wafer level package in which a top surface of each of the plurality of second semiconductor chips is exposed.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 26, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-won Kim, Jong-youn Kim, Eun-kyoung Choi, Sang-uk Han, Ji-seok Hong
  • Publication number: 20130299969
    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip and a sealing member. The first semiconductor chip includes a substrate having a first surface and a second surface opposite to the first surface and having an opening that extends in a predetermined depth from the second surface, and a plurality of through electrodes extending in a thickness direction from the first surface, end portions of the through electrodes being exposed through a bottom surface of the opening. The second semiconductor chip is received in the opening and mounted on the bottom surface of the opening. The sealing member covers the second semiconductor chip in the opening.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Won KIM, Kwang-Chul CHOI, Hyun-Jung SONG, Cha-Jea JO, Eun-Kyoung CHOI, Ji-Seok HONG
  • Publication number: 20130108540
    Abstract: Disclosed is a method for producing graphene functionalized at its edge positions of graphite. Organic material having one or more functional groups is reacted with graphite in reaction medium comprising methanesulfonic acid and phosphorus pentoxide, or in reaction medium comprising trifluoromethanesulfonic acid, to produce graphene having organic material fuctionalized at edges. And then, high purity and large scaled graphene and film can be obtained by dispersing, centrifugal separating the functionalized graphene in a solvent and reducing, in particular heat treating the graphene. According to the present invention graphene can be produced inexpensively in a large amount with a minimum loss of graphite.
    Type: Application
    Filed: February 24, 2012
    Publication date: May 2, 2013
    Inventors: Jong Beom Baek, Eun Kyoung Choi, In Yup Jeon, Seo Yoon Bae
  • Publication number: 20120171814
    Abstract: Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer.
    Type: Application
    Filed: September 17, 2011
    Publication date: July 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-Kyoung CHOI, SeYoung JEONG, Kwang-chul CHOI, Tae Hong MIN, Chungsun LEE, Jung-Hwan KIM
  • Patent number: 5843773
    Abstract: A new Bcl-2 related gene "Bfl-1", a polypeptide encoded by said gene, and a plasmid and a transformant comprising said gene are disclosed. The gene can be used to detect cancer.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: December 1, 1998
    Assignees: Korea Green Cross Corporation, Postech Foundation
    Inventors: Hee Sup Shin, Young Chul Sung, Seok Il Hong, Sun Sim Choi, Jin Won Yun, Eun Kyoung Choi, In Chul Park