Abstract: A method of forming a semiconductor device includes: loading a wafer onto a susceptor, wherein the susceptor is disposed inside a chamber; heating the inside of the chamber; and rotating the susceptor, and first forming a film on the wafer by outputting a reactive gas and a carrier gas from an injector disposed at a sidewall of the chamber to form a semiconductor device having a first layer, wherein the first layer is manufactured under a first condition, wherein the injector includes a first outlet exposed within the chamber to discharge the carrier gas directly into the chamber and a second outlet exposed within the chamber to discharge the reactive gas directly into the chamber, wherein the first outlet is disposed below the second outlet.

Abstract: A thin film forming apparatus includes: an injector, the injector including: a distributor including a first distribution portion connected to a first gas inlet, and a second distribution portion connected to a second gas inlet; and a guide connected to the distributor, the guide including a first outlet connected to the first distribution portion, and a second outlet connected to the second distribution portion, wherein the second outlet is disposed above the first outlet.

Abstract: A thin film forming apparatus includes: an injector, the injector including: a distributor including a first distribution portion connected to a first gas inlet, and a second distribution portion connected to a second gas inlet; and a guide connected to the distributor, the guide including a first outlet connected to the first distribution portion, and a second outlet connected to the second distribution portion, wherein the second outlet is disposed above the first outlet.

Abstract: Provided is a nonvolatile memory device. The nonvolatile memory device may include a tunnel insulating layer on a semiconductor substrate; a charge trap layer disposed on the tunnel insulating layer and having an electron affinity greater than a silicon nitride layer; a barrier insulating layer on the charge trap layer; a blocking insulating layer on the barrier insulating layer; and a gate electrode on the blocking insulating layer. An electron affinity of the barrier insulating layer is smaller than an electron affinity of the blocking insulating layer.