Abstract: A cooking apparatus and a control method thereof, and more particularly, technology for determining the type of vessel placed in the cooking apparatus and controlling power in response to a state change of the placed vessel or a temperature change of a coil. In accordance with one aspect, a cooking apparatus includes: a coil on which a vessel is placed, configured to form a magnetic field upon application of a current; a detection sensor configured to detect a magnitude of an input current applied differently according to a type of the vessel and a magnitude of an input voltage of the cooking apparatus; and a controller configured to determine a type of the placed vessel according to a power value calculated based on the detected input current and input voltage, and to determine a heating mode of the cooking apparatus based on the determined type of vessel.

Abstract: Provided herein may be a storage device having improved write performance. The storage device may include a memory device and a memory controller. The memory controller may generate check-in information indicating start of a program operation in response to a write request received from the host, control the memory device to perform a program operation of storing data received from the host in a target area of the memory device, generate check-out information indicating whether the program operation has succeeded, and provide a write result response including the check-out information to the host in response to a write return request received from the host.

Abstract: A memory controller for controlling a plurality of memory chips of a non-volatile memory includes a first core configured to identify a size of a remaining space of a page to be written in a memory chip on which a write operation is to be performed among the plurality of memory chips and fetch a first write command from a first submission queue among a plurality of submission queues included in a host, the first write command being related to data having a size corresponding to that of the remaining space of the page to be written, and a second core configured to control the non-volatile memory to store data related to the fetched first write command in the remaining space of the page to be written.

Abstract: A data storage apparatus may include: a storage comprising a memory cell array and configured to complete a program operation for the memory cell array by sequentially performing a first stage program operation and a second stage program operation, and output, after the first stage program operation, a partial program completion signal in response to a first program command for first data; and a controller configured to transmit the first program command to the storage, and invalidate the first data stored in a buffer memory and perform a preparation operation for a subsequent request, as the partial program completion signal is received from the storage. The storage performs the second stage program operation while the controller performs the preparation operation for the subsequent request.

Abstract: A data storage apparatus may include: a storage comprising a plurality of memory blocks in which data are stored; and a controller configured to exchange data with the storage. The controller comprises: a hot block listing component configured to add information on an erased memory block to a hot block list when the erased memory block occurs; a candidate selector configured to select one or more candidate blocks among the plurality of memory blocks based on wear levels of the respective memory blocks; a victim block selector configured to select, as a victim block, at least one block in the hot block list among the candidate blocks; and a wear leveling component configured to perform a wear leveling operation using the victim block.

Abstract: The present technology relates to an electronic device. Based on the present technology, a storage device providing an improved security function may include a memory device including a protected memory block that is configured to store information for authenticating data to be read from or written to the memory device and is protected by a security protocol and a memory controller coupled to the memory device to control operations thereof and configured to receive a command protocol unit associated with the security protocol in a command including a host side protection message requesting data from a host be written in the protected memory block and perform a computation of a device message authentication code to be used in an authentication operation of the protected memory block, wherein the computation is performed concurrently with receiving a plurality of data units including the data from the host that is to be written in the protected memory block.

Abstract: A method for operating a data processing system including a host and a memory system coupled to each other through a plurality of slots and using a Universal Flash Storage (UFS) interface, the method includes: allocating, by the host, dedicated memory regions respectively corresponding to the slots during a booting operation of the host; communicating, between the host and the memory system in parallel through the slots based on command packets and address information for data buffer regions, the command packets and the address information being stored in the dedicated memory regions; and deallocating, by the host, the dedicated memory regions during a shutdown of the host.

Abstract: A cooking apparatus and a control method thereof, and more particularly, technology for determining the type of vessel placed in the cooking apparatus and controlling power in response to a state change of the placed vessel or a temperature change of a coil. In accordance with one aspect, a cooking apparatus includes: a coil on which a vessel is placed, configured to form a magnetic field upon application of a current; a detection sensor configured to detect a magnitude of an input current applied differently according to a type of the vessel and a magnitude of an input voltage of the cooking apparatus; and a controller configured to determine a type of the placed vessel according to a power value calculated based on the detected input current and input voltage, and to determine a heating mode of the cooking apparatus based on the determined type of vessel.

Abstract: Provided herein may be a storage device having improved write performance. The storage device may include a memory device and a memory controller. The memory controller may generate check-in information indicating start of a program operation in response to a write request received from the host, control the memory device to perform a program operation of storing data received from the host in a target area of the memory device, generate check-out information indicating whether the program operation has succeeded, and provide a write result response including the check-out information to the host in response to a write return request received from the host.

Abstract: A memory controller for controlling a plurality of memory chips of a non-volatile memory includes a first core configured to identify a size of a remaining space of a page to be written in a memory chip on which a write operation is to be performed among the plurality of memory chips and fetch a first write command from a first submission queue among a plurality of submission queues included in a host, the first write command being related to data having a size corresponding to that of the remaining space of the page to be written, and a second core configured to control the non-volatile memory to store data related to the fetched first write command in the remaining space of the page to be written.

Abstract: A method for operating a data processing system including a host and a memory system coupled to each other through a plurality of slots and using a Universal Flash Storage (UFS) interface, the method includes: allocating, by the host, dedicated memory regions respectively corresponding to the slots during a booting operation of the host; communicating, between the host and the memory system in parallel through the slots based on command packets and address information for data buffer regions, the command packets and the address information being stored in the dedicated memory regions; and deallocating, by the host, the dedicated memory regions during a shutdown of the host.

Abstract: A memory system includes a nonvolatile memory device including a plurality of memory blocks each including a plurality of pages; and a controller suitable for, when writing a plurality of data in the pages according to a write request from a host, writing the plurality of data with tags, classified into N number of kinds depending on a usage pattern of each data, together in the pages. The controller manages a list of victim blocks as a target of a merge operation, the controller manages entire valid pages included in the victim blocks, by classifying them into N number of page groups depending on a kind of each of the entire valid pages, and the controller selects valid pages to be moved to a free block in the merge operation, among the entire valid pages, and N may be a natural number of 2 or greater.

Abstract: Disclosed is a memory controller comprising: a memory unit including tables, in which various segments are stored; a calculator configured to update a parity for the segments stored in each of the tables whenever the table is updated when a segment is currently inputted, detect an error in the table based on a previously updated parity and a currently updated parity corresponding to the table; and a bit inverter configured to correct the detected error, and an operating method therefor.

Abstract: A controller includes: a counter suitable for counting a number of valid pages in each of a plurality of blocks in a memory device as first parameter values; a block selector suitable for selecting one or more first candidate blocks, the first parameter value of each of which is within a predetermined range, and selecting a victim block among the one or more first candidate blocks; and a processor suitable for controlling the memory device to read valid data stored in the victim block and program the valid data into a target block in the memory device.

Abstract: A memory system may include: a nonvolatile memory device including dies, each including planes, each including blocks, each including pages, each including a set number of sections, and page buffers for caching data to be outputted from the blocks by page unit; a host controller suitable for processing an operation with a host; and a memory controller coupled with the host controller, and suitable for processing an operation with the nonvolatile memory device, the memory controller: may check whether a read operation for a read-target block, among the blocks, is for a merge operation, may select whether to perform a page-buffer-caching-update operation of reading requested data from a page of the read-target block and caching the read data in a corresponding one of the page buffers based on a result of the check, and may receive the cached data from the corresponding page buffer.

Abstract: A memory system includes a nonvolatile memory device including a plurality of memory blocks; and a controller configured to generate an address mapping table based on a first mapping information on a first logical address set corresponding to host data, wherein the controller generates a second logical address set corresponding to metadata, and generates the address mapping table which includes a second mapping information on the second logical address set and the first mapping information.

Abstract: A memory system includes a nonvolatile memory device including a plurality of memory blocks each including a plurality of pages; and a controller suitable for, when writing a plurality of data in the pages according to a write request from a host, writing the plurality of data with tags, classified into N number of kinds depending on a usage pattern of each data, together in the pages. The controller manages a list of victim blocks as a target of a merge operation, the controller manages entire valid pages included in the victim blocks, by classifying them into N number of page groups depending on a kind of each of the entire valid pages, and the controller selects valid pages to be moved to a free block in the merge operation, among the entire valid pages, and N may be a natural number of 2 or greater.

Abstract: A controller includes: a counter suitable for counting a number of valid pages in each of a plurality of blocks in a memory device as first parameter values; a block selector suitable for selecting one or more first candidate blocks, the first parameter value of each of which is within a predetermined range, and selecting a victim block among the one or more first candidate blocks; and a processor suitable for controlling the memory device to read valid data stored in the victim block and program the valid data into a target block in the memory device.

Abstract: In accordance with an embodiment of the present invention, a memory system may include a memory device suitable for storing data; and a controller including a first memory, wherein the controller is suitable for: performing system operations to the memory device and the controller; storing meta-data corresponding to the system operations into the memory device; storing the meta-data stored in the memory device into one or more between the first memory and a second memory included in a host; and identifying the meta-data from the memory device, the first memory and the second memory when performing the system operations.

Abstract: Disclosed is a memory controller comprising: a memory unit including tables, in which various segments are stored; a calculator configured to update a parity for the segments stored in each of the tables whenever the table is updated when a segment is currently inputted, detect an error in the table based on a previously updated parity and a currently updated parity corresponding to the table; and a bit inverter configured to correct the detected error, and an operating method therefor.