Abstract: A coated substrate including: a substrate including a treated layer, a photocatalytic layer, and a protective layer between the photocatalytic layer and the treated layer, the protective layer comprising colloidal particles dispersed in a matrix, the colloidal particles including first and second types of particles that differ in their respective particle size distributions and which together provide a physical barrier by virtue of the first, smaller particles at least partially filling interstices between the second, larger particles and thereby impede photocatalyst derived degradation of the treated layer, the first type of colloid particles comprising hydrolyzed silica based material such as reactive silica condensate particles or polyhedral oligomeric silsesquioxanes, or mixtures thereof, the protective layer having an effect of less than 20 delta E units on the color and gloss of the substrate.

Abstract: A coated substrate including a substrate including a treated layer, a photocatalytic layer, and a protective layer for impeding photocatalyst derived degradation of the treated layer, the protective layer being provided between the photocatalytic layer and the treated layer, the protective layer comprising colloidal particles distributed in a matrix comprised at least partly of an organosilicon phase which is oxidizable by the reactive oxygen species to form a non-volatile inorganic phase, wherein the organosilicon phase includes a surfactant incorporating an organosilicon component.

Abstract: A coated substrate including: a substrate including a treated layer, a photocatalytic layer, and a protective layer between the photocatalytic layer and the treated layer, the protective layer comprising colloidal particles dispersed in a matrix, the colloidal particles including first and second types of particles that differ in their respective particle size distributions and which together provide a physical barrier by virtue of the first, smaller particles at least partially filling interstices between the second, larger particles and thereby impede photocatalyst derived degradation of the treated layer, the first type of colloid particles comprising hydrolysed silica based material such as reactive silica condensate particles or polyhedral oligomeric silsesquioxanes, or mixtures thereof, the protective layer having an effect of less than 20 delta E units on the colour and gloss of the substrate.

Abstract: A coated substrate including a substrate including a treated layer, a photocatalytic layer, and a protective layer for impeding photocatalyst derived degradation of the treated layer, the protective layer being provided between the photocatalytic layer and the treated layer, the protective layer comprising colloidal particles distributed in a matrix comprised at least partly of an organosilicon phase which is oxidisable by the reactive oxygen species to form a non-volatile inorganic phase, wherein the organosilicon phase includes a surfactant incorporating an organosilicon component.

Abstract: A method for repairing a printed circuit board includes the step of generating fault data relating to the plots or layout of a printed circuit board from a circuit board testing device. The printed circuit board under test is positioned on a workstation. An image containing repair data based on the fault data is projected directly onto the printed circuit board and is overlaid in registration with the plot or layout of the printed circuit board to assist in operator repair.

Abstract: A method for verification of components installed on a printed circuit board includes the step of capturing an image of an entire printed circuit board and components mounted thereon using a scanning device. After it has been determined that a printed circuit board having no defects, the scanned image of the circuit board has no defects is stored in a memory. The image of the entire printed circuit board under test, and having potential defects is then captured using a scanning device. The image of the printed circuit board under test is then stored in a memory. The stored image of the printed circuit board having no defects is then overlaid in registration with the stored image of the printed circuit board with potential defects on a display in alternating sequence in order to visually provide an indication of a defective component or defective component placement on the printed circuit board under test to an operator.

Abstract: A collapsible shelter includes an arcuate roof section which includes a left and a right edge having a downwardly extending lip portion. A plurality of left and right arcuate sections have a left edge provided with a downwardly extending lip portion and a right edge with an upwardly extending lip portion adapted to cooperate with downwardly extending lip portions of the arcuate roof section. The remaining left and right arcuate sections have a left edge provided with a downwardly extending lip portion and a right edge provided with an upwardly extending lip portion for cooperating with the downwardly extending lip portion of a previous left and right arcuate section. The base section has an arcuate extending base member and an upwardly extending lip adapted to cooperate with the downwardly extending lip portion of a left section. An arcuate door section has a door member portion that mates with the base member extending portion that may include locking means to prevent the dome shelter from collapsing.

Abstract: A system for reducing the number of points to be tested on a printed circuit board where the printed circuit board includes a plurality of network traces each having end points and a plurality of pads provides for the identification of the end points of each network trace of the plurality of network traces. Certain ones of the plurality of network traces network located within a predetermined distance of one another are grouped to form a plurality of groups of network traces. The identified end points of the grouped network traces are connected together within each group of network traces to form a continuous trace having one pair of end points for each group of network traces. The end points are used for testing the printed circuit board.

Abstract: A system for reducing the number of points to be tested on a dual sided printed circuit board. The circuit board includes a top and a bottom surface and a plurality of network traces extending across both sides of the printed circuit board. Each network trace includes end points. The system provides for identifying the end points of a network trace extending on both sides of the printed circuit board. The mid-point along the network trace which is common to both sides of the printed circuit board is identified. Structure is provided for independently testing each side of the printed circuit board between one end point and the mid-point on the top surface of the printed circuit board and between the mid-point and the second end point on the bottom surface of the printed circuit board.

Abstract: An electrical connector for the terminating edge of a printed circuit board to form the portion of the printed circuit board adapted to engage bowed portions of contact fingers in a conventional card edge connector. The finger connector insulator includes a slotted head section for receiving the board edge and a blade section for engaging a conventional card edge connector. Each side of the insulator contains a plurality of spaced contact receiving sleeves formed by parallel, transversely extending recesses which face outwardly on the blade and inwardly from each wall of the slotted head and which are connected by coaxial apertures formed in the head section.

Abstract: A multiplicity of integrated circuit connector contact sockets mounted to a plurality of carrier strips are moved between pairs of orientation rollers with tails of the contacts protruding upwardly whereby an upper socket portion of one contact is aligned with an upper socket portion of a contact on a carrier strip in an adjacent row. A plurality of integrated circuit connector insulators having socket receiving apertures formed therein are held together in an array and placed over the contact tails with one tail being received within each aperture of an insulator. The carrier strips are simultaneously advanced beneath a work station wherein a tool presses the insulators downwardly to tightly fit the contact socket portions into the receiving apertures in the insulators. A shearing tool then severs the insulators in the array from one another except for the continued affixation of the contact sockets to the parallel carrier strips.

Abstract: A multiplicity of integrated circuit connector contact sockets mounted to a plurality of carrier strips are moved between pairs of orientation rollers with tails of the contacts protruding upwardly whereby an upper socket portion of one contact is aligned with an upper socket portion of a contact on a carrier strip in an adjacent row. A plurality of integrated circuit connector insulators having socket receiving apertures formed therein are held together in an array and placed over the contact tails with one tail being received within each aperture of an insulator. The carrier strips are simultaneously advanced beneath a work station wherein a tool presses the insulators downwardly to tightly fit the contact socket portions into the receiving apertures in the insulators. A shearing tool then severs the insulators in the array from one another except for the continued affixation of the contact sockets to the parallel carrier strips.

Abstract: A wire stringing apparatus interconnects terminals of electronic components mounted upon a circuit board. A wire stringing head, which is transported on an x-y mechanism driven by a controller, wraps an insulated wire about terminals and guide pins mounted on the circuit board. The insulated wire is connected throughout the circuitry to form all of the necessary interconnections. After the wire is installed an automatic solder feeding mechanism and a heating element are transported over the circuit board to selectively solder the interconnecting wire to the appropriate component terminals. The heat generated for the soldering procedure additionally removes the insulation from the interconnecting wire at the connection terminal. A cutting tool transported over the circuit board severs the interconnecting wire at selected points to form individual conduction paths between circuit terminals.