Abstract: A method for modeling the performance of memory address translation mechanism (MATM), comprises: a) receiving an execution profile that contains a memory address reference stream of an application, a set of page size mappings, and events about the application's data allocations and de-allocations; b) translating each memory reference in the input memory reference stream into a reference to the corresponding data object, by consulting the memory allocation and de-allocation events, to provide a data object reference stream; c) translating each data object reference into a corresponding page reference by consulting the page size mapping and by modeling the data allocation and de-allocation events in accordance with the mapping to provide a page reference stream and a number of pages of each page size that are needed by the respective mapping; d) using the page reference stream to provide a stream of reuse distance values; e) determining, for each reference in the reuse distance value stream, whether the referen

Abstract: A system and method includes steps, or acts, of: defining one or more events to provide a unified specification; registering one or more events to be detected; detecting an occurrence of at least one of the registered event or events; generating a monitoring entry each time one of the registered events is detected; and entering each of the monitoring entries generated into a single logical entity. The method can also be implemented as machine executable instructions executed by a programmable information processing system or as hard coded logic in a specialized computing apparatus such as an application-specific integrated circuit (ASIC).

Abstract: Disclosed are a method and system for predicting future values of a target metric associated with a task executed on a computer system. The method comprises the steps of, over a given period of time, measuring at least one defined metric, transforming that measurement into a value for a predictor source metric, and using the value for the predictor source metric to obtain a predicted future value for said target metric. The preferred embodiment of this invention provides a flexible performance multi-predictor to solve the problem of providing accurate future behavior predictions for adaptive reconfiguration systems. The multi-predictor makes predictions about future workload characteristic by periodically reading available hardware counters. Also disclosed is a method and system for periodically reconfiguring an adaptive computer system by rescheduling tasks based on future behavior predictions.

Abstract: Disclosed are a method and system for predicting future values of a target metric associated with a task executed on a computer system. The method includes the steps of, over a given period of time, measuring at least one defined metric, transforming that measurement into a value for a predictor source metric, and using the value for the predictor source metric to obtain a predicted future value for said target metric. The preferred embodiment of this invention provides a flexible performance multi-predictor to solve the problem of providing accurate future behavior predictions for adaptive reconfiguration systems. The multi-predictor makes predictions about future workload characteristic by periodically reading available hardware counters. Also disclosed is a method and system for periodically reconfiguring an adaptive computer system by rescheduling tasks based on future behavior predictions.

Abstract: A method of optimizing a computer program includes generating annotation information about the computer program, storing the annotation information with the computer program, and dynamically optimizing the computer program based on the annotation information while the computer program is being executed.

Abstract: A system and method for dynamically patching code. In one embodiment, a method includes intercepting original program instructions during execution of the program using a software interface, determining whether associated instructions have been cached in a code cache of the software interface and, if so, executing the cached instructions from the code cache, if associated instructions have not been cached, determining if the original program instructions require unavailable hardware functionality, and dynamically replacing the original program instructions with replacement instructions that do not require unavailable hardware functionality if it is determined that the original program instructions require unavailable hardware functionality, the dynamic replacing including fetching replacing instructions, storing the replacement instructions in the code cache, and executing the replacement instructions from the code cache.

Abstract: The present disclosure relates to a system and method for dynamically replacing code. In one arrangement, the system and method pertain to intercepting original program instructions during execution of the program, determining if an original program instruction is to be replaced, and dynamically replacing the program instruction with a replacement instruction if it is determined that the original program instruction is to be replaced.

Abstract: Disclosed are a method and system for predicting future values of a target metric associated with a task executed on a computer system. The method comprises the steps of, over a given period of time, measuring at least one defined metric, transforming that measurement into a value for a predictor source metric, and using the value for the predictor source metric to obtain a predicted future value for said target metric. The preferred embodiment of this invention provides a flexible performance multi-predictor to solve the problem of providing accurate future behavior predictions for adaptive reconfiguration systems. The multi-predictor makes predictions about future workload characteristic by periodically reading available hardware counters. Also disclosed is a method and system for periodically reconfiguring an adaptive computer system by rescheduling tasks based on future behavior predictions.

Abstract: An optimization scheme used at run-time or compile-time is capable of identifying partially redundant loads and determining whether the load is truly redundant. The truly redundant load may be replaced with a register copy instruction to reduce the memory traffic and save CPU cycle time.

Abstract: A method for growing a secondary trace out of a cache of translations for a program during the program's execution in a dynamic translator, comprising the steps of: maintaining execution counts for translation heads that are executed from a code cache; when an execution count for one of said translation heads exceeds a threshold, designated as a hot translation head, beginning a mode of operation in which, as following code translations are executed from the code cache after the execution of the hot translation head, storing in a history buffer information identifying each of the following code translations in sequence; terminating the storing of information in the history buffer in relation to the hot translation head when a termination condition is met; and linking together the translation head and the sequence of following code translations identified in the history buffer to form a larger code translation.

Abstract: In a system and method for linking and unlinking code fragments stored in a code cache, a memory area is associated with a branch in a first code fragment that branches outside the cache. If the branch can be set to branch to a location in a second code fragment stored in the cache, branch reconstruction information is stored in the memory area associated with the branch, and the branch instruction is updated to branch to the location in the second code fragment, thereby linking the first code fragment to the second code fragment. If it is determined that the previously linked branch should be unlinked, the first and second code fragments at that branch are unlinked by reading the information stored in the associated memory area at the time of linking, and using that information to reset the branch to its state prior to the linking.

Abstract: Systems and methods for implementing efficient execution transfers between successive translations of stack-based code in a virtual machine environment are provided. Briefly described, one such method comprises the steps of: defining a global translation convention for translating one or more stack-based code instructions on a register-based environment, the global translation convention specifying a predetermined portion of a stack-based context corresponding to a stack that is to be mapped to one or more registers corresponding to the register-based environment and enforcing the global translation convention for each translation of the one or more stack-based code instructions in the register-based environment.

Abstract: Systems and methods for verifying execution of translated code operative on a host computer system different from the computer system designated for the original program code. In one arrangement, the system and method fetch program code, translate program code, emit the translated program code into at least one code cache, execute the translated code within the at least one code cache, interpret the program code, and compare a translator generated state with an interpreter generated state to confirm desired code execution.

Abstract: A method of producing a caching dynamic translator with portable run-time code synthesis includes programming hardware independent replacement functions in a high level programming language for the caching dynamic translator, and compiling the hardware independent replacement functions to produce hardware dependent computer executable replacement functions.

Abstract: The present disclosure relates to a system and method for dynamically patching code. In one arrangement, the system and method pertain to intercepting program instructions, determining if a program instruction requires unavailable hardware functionality, and dynamically replacing the program instruction with a replacement instruction that does not require unavailable hardware functionality if it is determined that the program instruction requires unavailable hardware functionality.

Abstract: The present disclosure relates to a system and method for dynamically replacing code. In one arrangement, the system and method pertain to intercepting program instructions, determining if a program instruction is to be replaced, and dynamically replacing the program instruction with a replacement instruction if it is determined that the program instruction is to be replaced.

Abstract: The present disclosure relates to a system and method for emulating a computer system. In one arrangement, the system and method pertain to fetching program code, translating program code, emitting translated program code into at least one code cache, and executing translated code within the at least one code cache in lieu of associated program code when a semantic function of the associated program code is requested. Operation of the system and method can be facilitated with an application programming interface that, in one arrangement, can comprise a set of functions available to the translator including an emit fragment function with which the translator can emit code fragments into code caches of the dynamic execution layer interface, and an execute function with which the translator can request execution of code fragments contained within the at least one code cache.

Abstract: A method of optimizing a computer program includes generating annotation information about the computer program, storing the annotation information with the computer program, and dynamically optimizing the computer program based on the annotation information while the computer program is being executed.

Abstract: Apparatus for dynamically transforming and caching at least one computer program. The apparatus comprises computer executable instructions stored on one or more computer readable storage media. The apparatus includes instructions for dynamically transforming and caching code fragments and for causing the code fragments to be executed by at least one computer processor. The apparatus also includes instructions providing an application programming interface enabling the at least one computer program to activate the instructions for dynamically transforming code fragments and the instructions for caching code fragments.

Abstract: A method and apparatus for selecting hot traces for translation and/or optimization is described in the context of a caching dynamic translator. The code cache stores hot traces. Profiling is done at locations that satisfy a start-of-trace condition, e.g., the targets of backward taken branches. A hot target of a backward taken branch is speculatively identified as the beginning of a hot trace, without the need to profile the blocks that make up the trace. The extent of the speculatively selected hot trace is determined by an end-of-trace condition, such as a backward taken branch or a number of interpreted or native instructions. The interpreter is augmented with a mode in which it emits native instructions that are cached. A trace is cached by identifying a hot start of a trace and then continuing interpretation while storing the emitted native instruction stream until an end-of-trace condition is met.