Abstract: An electronic component (15) such as a printed circuit board (PCB) is formed using a sintering process. A layer of dielectric powder (11) is partially converted to a solid layer of dielectric material (14) by exposing selective portions of the powder (11) to a laser (17). A layer of conductive powder (20) is then formed over the solid layer of dielectric material (14) and selectively sintered to form a solid layer of conductive material (19). This process can be used to form an interconnect structure (45), a coaxial structure (60), a cavity (89), a trench structure (90), or a slug (91), conductive traces (19), bond pads (31), or any other circuit board structure.

Abstract: An overmolded semiconductor device (30, 50) has a contoured package body profile instead of a conventional flat package body surface for uniform filling during the molding process. A cross-section of the semiconductor device reveals a substantially uniform thickness of plastic (36 and 38) covering the carrier substrate (14) and overmolding the semiconductor die (12). Alternatively, a thicker layer of plastic (58) overmolds the semiconductor die (12') than the layer of plastic (56) covering the carrier substrate (14'). The contoured package body profile is designed to allow a uniform flow front progression of molding compound during the molding process to eliminate voids in the package body by providing the same resistive pressure to the molding compound flow front during filling.

Abstract: A method of packaging a semiconductor device includes providing a chase (11) with a cavity (12). The cavity (12) has a cavity sidewall (13). A substrate (19) is provided having a substrate sidewall (20) wherein the substrate (19) is positioned in the cavity (12). A space or gap (21) is formed between the substrate sidewall (20) and the cavity sidewall (13). To insulate the gap (21) from mold compound (27), a barrier layer (22) is placed adjacent to the chase (11) and adjacent to the substrate (19) wherein the barrier layer (22) overlays a portion of the space or gap (21). Mold compound (27) is injected over the barrier layer (22), over the portion of the space or gap (21), and toward the substrate (19). The barrier layer (22) is used to prohibit the mold compound (27) from contacting the substrate sidewall (20) and the cavity sidewall (13) when the substrate (19) is being encapsulated.

Abstract: High performance semiconductor devices, such as those used to package microprocessor integrated circuits, demand materials with excellent electrical, physical and chemical properties. Polymethylpentene (PMP) compositions provide resin substrates for high performance devices with a material which has a low dielectric constant and a low dissipation factor. In addition, PMP has very low moisture absorption, and good mechanical stability under repeated thermal stress, which will help keep the device from cracking and warping during high temperature assembly processes and constant use.

Abstract: Methods and apparatus are provided for applying solder in precise amounts to fine pitch leads such as those suitable for direct chip attachment (DCA) or flip-chip applications by using a heated platen to apply pressure to solder overlaying a plurality of lands on circuitized substrate. In one embodiment paste solder screened through a mask having apertures each corresponding to a plurality of land locations. In another embodiment, a web of solder foil is accurately positioned over a plurality of fine pitch lands. In each embodiment, a heated platen includes at least one active element corresponding in size and shape to the area having a plurality of fine pitch lands. A third embodiment includes individual platens for lands to which solder is to be applied.

Abstract: A no clean thermally dissipated soldering flux is shown which includes camphor as a flux base, an organic activator and an organic diluent. The camphor provides a tacky yet fluid medium which is thermally dissipated during the flux operation and leaves no undesirable residue which would require a postcleaning step.