Patents by Inventor EVGENY MEKHANIK
EVGENY MEKHANIK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230326528Abstract: A system and method for calibrating read threshold voltages includes performing a plurality of read operations, determining to perform a read level tracking method, and performing the read level tracking method. The determining may be based on a temperature change or a bit error rate (BER). The read level tracking method includes determining the BER of an indicative word line, determining an adjusted read threshold level based on the BER, and adjusting read threshold levels according to the adjusted read threshold level.Type: ApplicationFiled: April 6, 2022Publication date: October 12, 2023Applicant: Western Digital Technologies, Inc.Inventors: Eran Sharon, Nika Yanuka, Idan Alrod, Alexander Bazarsky, Evgeny Mekhanik
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Patent number: 11709621Abstract: A system and method for read threshold calibration in a non-volatile memory are provided. Physical dies in the memory are divided into groups based on device-level parameters such as time and temperature parameters. An outlier die may be identified outside of the plurality of groups based on a comparison of a bit error rate (BER) indicator for each die to a threshold. For each group of dies, a read parameter is determined for at least one die, and applied to each of the plurality of dies of the group. The read parameter may be determined based on a threshold measurement of a representative one or more word lines.Type: GrantFiled: April 14, 2021Date of Patent: July 25, 2023Assignee: Western Digital Technologies Inc.Inventors: Dudy Avraham, Alex Bazarsky, Evgeny Mekhanik
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Publication number: 20220382625Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command form a host device, collect environment data of the memory device, decode data associated with the read command, determine a bit error rate (BER) of the decoded data, compare the BER to a threshold, and determine whether the data associated with the read command is to be relocated. The environment data includes temperature, number of program/erase cycles, amount of grown defects, number of past relocations and time since last data relocation. The controller is further configured to dynamically adjust the threshold based on the collected environment data and an amount of time that has passed since a last relocation of the read command data.Type: ApplicationFiled: May 27, 2021Publication date: December 1, 2022Inventors: Evgeny MEKHANIK, Dudy David AVRAHAM, Alexander BAZARSKY
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Patent number: 11513890Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command form a host device, collect environment data of the memory device, decode data associated with the read command, determine a bit error rate (BER) of the decoded data, compare the BER to a threshold, and determine whether the data associated with the read command is to be relocated. The environment data includes temperature, number of program/erase cycles, amount of grown defects, number of past relocations and time since last data relocation. The controller is further configured to dynamically adjust the threshold based on the collected environment data and an amount of time that has passed since a last relocation of the read command data.Type: GrantFiled: May 27, 2021Date of Patent: November 29, 2022Assignee: Western Digital Technologies, Inc.Inventors: Evgeny Mekhanik, Dudy David Avraham, Alexander Bazarsky
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Patent number: 11385802Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.Type: GrantFiled: March 27, 2020Date of Patent: July 12, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Eran Sharon, Nian Niles Yang, Idan Alrod, Evgeny Mekhanik, Mark Shlick, Joanna Lai
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Publication number: 20220113894Abstract: A system and method for read threshold calibration in a non-volatile memory are provided. Physical dies in the memory are divided into groups based on device-level parameters such as time and temperature parameters. An outlier die may be identified outside of the plurality of groups based on a comparison of a bit error rate (BER) indicator for each die to a threshold. For each group of dies, a read parameter is determined for at least one die, and applied to each of the plurality of dies of the group. The read parameter may be determined based on a threshold measurement of a representative one or more word lines.Type: ApplicationFiled: April 14, 2021Publication date: April 14, 2022Applicant: Western Digital Technologies Inc.Inventors: Dudy Avraham, Alex Bazarsky, Evgeny Mekhanik
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Publication number: 20220011967Abstract: A method, device, and system for improving read performance in frequently changing device temperature conditions through detecting thermal region tags and thermal region outliers in a memory device. A plurality of thermal regions may be configured for the memory device. A first temperature may be measured corresponding to opening a storage block of the memory device for programming. A second temperature may then be measured corresponding to closing the storage block for programming. A range between the first temperature and the second temperature may be determined. The range may span N?2 of the thermal regions. Finally, the storage block may be assigned to a thermal region that includes the second temperature, on condition that N satisfies a threshold.Type: ApplicationFiled: July 8, 2020Publication date: January 13, 2022Applicant: Western Digital Technologies, Inc.Inventors: Evgeny Mekhanik, Tomer Tzvi Eliash, Barak Goldberg
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Patent number: 11210031Abstract: A method, device, and system for improving read performance in frequently changing device temperature conditions through detecting thermal region tags and thermal region outliers in a memory device. A plurality of thermal regions may be configured for the memory device. A first temperature may be measured corresponding to opening a storage block of the memory device for programming. A second temperature may then be measured corresponding to closing the storage block for programming. A range between the first temperature and the second temperature may be determined. The range may span N?2 of the thermal regions. Finally, the storage block may be assigned to a thermal region that includes the second temperature, on condition that N satisfies a threshold.Type: GrantFiled: July 8, 2020Date of Patent: December 28, 2021Assignee: Western Digital Technologies, Inc.Inventors: Evgeny Mekhanik, Tomer Tzvi Eliash, Barak Goldberg
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Patent number: 11126368Abstract: A method for finding a last good page in a memory system includes determining a first number of write operations in a first queue at a first page in a memory block of the memory system. The method also includes determining whether the first number of write operations in the first queue is above a threshold. The method also includes based on a determination that the first number of write operations in the first queue is above the threshold, determining whether a second page in the memory block is empty. The method also includes identifying, based on a determination that the second page is empty, the last good page in the memory block using a binary search between the first page and the second page.Type: GrantFiled: April 30, 2019Date of Patent: September 21, 2021Assignee: Western Digital Technologies, Inc.Inventors: Tomer Eliash, Evgeny Mekhanik, David Rozman, Yair Chasdai
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Patent number: 10977125Abstract: A data storage system performs operations including receiving a data write command specifying data to be written; selecting an irregular LDPC encoding scheme of a plurality of available irregular LDPC encoding schemes available to the encoder in accordance with (i) a working mode of the data storage system, (ii) device-specific criteria and/or (iii) a data type of the specified data; and encoding the specified data to be written using the selected irregular LDPC encoding scheme.Type: GrantFiled: June 6, 2019Date of Patent: April 13, 2021Assignee: Western Digital Technologies, Inc.Inventors: Evgeny Mekhanik, Ran Zamir, Eran Sharon
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Publication number: 20200387427Abstract: A data storage system performs operations including receiving a data write command specifying data to be written; selecting an irregular LDPC encoding scheme of a plurality of available irregular LDPC encoding schemes available to the encoder in accordance with (i) a working mode of the data storage system, (ii) device-specific criteria and/or (iii) a data type of the specified data; and encoding the specified data to be written using the selected irregular LDPC encoding scheme.Type: ApplicationFiled: June 6, 2019Publication date: December 10, 2020Inventors: Evgeny Mekhanik, Ran Zamir, Eran Sharon
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Publication number: 20200348880Abstract: A method for finding a last good page in a memory system includes determining a first number of write operations in a first queue at a first page in a memory block of the memory system. The method also includes determining whether the first number of write operations in the first queue is above a threshold. The method also includes based on a determination that the first number of write operations in the first queue is above the threshold, determining whether a second page in the memory block is empty. The method also includes identifying, based on a determination that the second page is empty, the last good page in the memory block using a binary search between the first page and the second page.Type: ApplicationFiled: April 30, 2019Publication date: November 5, 2020Applicant: Western Digital Technologies, Inc.Inventors: Tomer Eliash, Evgeny Mekhanik, David Rozman, Yair Chasdai
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Publication number: 20200225852Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.Type: ApplicationFiled: March 27, 2020Publication date: July 16, 2020Inventors: Eran SHARON, Nian Niles YANG, Idan ALROD, Evgeny MEKHANIK, Mark SHLICK, Joanna LAI
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Patent number: 10642510Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.Type: GrantFiled: June 7, 2018Date of Patent: May 5, 2020Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Eran Sharon, Nian Niles Yang, Idan Alrod, Evgeny Mekhanik, Mark Shlick, Joanna Lai
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Patent number: 10475523Abstract: A device includes a memory and a controller coupled to the memory. The controller is configured to associate a first value of a memory access parameter with a first group indicator. The controller is configured to perform an update operation to determine a second value of the memory access parameter based on first data read from the memory and to generate a first updated value of the memory access parameter. The first updated parameter is associated with the first group indicator and is based on the first value and the second value.Type: GrantFiled: June 6, 2017Date of Patent: November 12, 2019Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Eran Sharon, David Avraham, Evgeny Mekhanik, Alexander Bazarsky
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Patent number: 10394649Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.Type: GrantFiled: March 14, 2018Date of Patent: August 27, 2019Assignee: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Alon Eyal, Liang Pang, Evgeny Mekhanik
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Patent number: 10372536Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.Type: GrantFiled: March 14, 2018Date of Patent: August 6, 2019Assignee: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Alon Eyal, Liang Pang, Evgeny Mekhanik
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Patent number: 10262743Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A command is issued for performing a conditioning operation which helps to transition the memory cells so that their threshold voltages are at predictable levels. In one approach, the conditioning operation is performed by applying a voltage pulse to one or more word lines in response to a trigger, such as detecting that a duration since a last sensing operation exceeds a threshold, detecting that a duration since a last performance of the conditioning operation exceeds a threshold, or a detecting that a read command has been issued. Moreover, the peak power consumption required to perform the conditioning operation can be reduced for various configurations of a memory device on one or more die.Type: GrantFiled: February 23, 2017Date of Patent: April 16, 2019Assignee: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Alon Eyal, Liang Pang, Evgeny Mekhanik
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Publication number: 20180293009Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.Type: ApplicationFiled: June 7, 2018Publication date: October 11, 2018Inventors: Eran SHARON, Nian Niles YANG, Idan ALROD, Evgeny MEKHANIK, Mark SHLICK, Joanna LAI
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Publication number: 20180203762Abstract: Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage of a memory cell can shift depending on when the read operation occurs. A memory cell is sensed by discharging a sense node into a bit line and detecting an amount of discharge at two sense times relative to a trip voltage. A bit of data is stored in first and second latches based on the two sense times, to provide first and second pages of data. The pages are evaluated using parity check equations and one of the pages which satisfies the most equations is selected. In another option, word line voltages are grounded and then floated to prevent coupling up of the word line. A weak pulldown to ground can gradually discharge a coupled up voltage of the word lines.Type: ApplicationFiled: March 14, 2018Publication date: July 19, 2018Applicant: SanDisk Technologies LLCInventors: Idan Alrod, Eran Sharon, Alon Eyal, Liang Pang, Evgeny Mekhanik