Patents by Inventor Eyob A. Sete
Eyob A. Sete has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990905Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.Type: GrantFiled: April 26, 2023Date of Patent: May 21, 2024Assignee: Rigetti & Co, LLCInventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
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Patent number: 11977113Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.Type: GrantFiled: February 6, 2023Date of Patent: May 7, 2024Assignee: Rigetti & Co, LLCInventors: William J. Zeng, Eyob A. Sete, Chad Tyler Rigetti
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Patent number: 11977956Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: GrantFiled: January 18, 2023Date of Patent: May 7, 2024Assignee: Rigetti & Co, LLCInventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
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Publication number: 20240146307Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.Type: ApplicationFiled: April 26, 2023Publication date: May 2, 2024Applicant: Rigetti & Co, LLCInventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
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Publication number: 20240112060Abstract: In a general aspect, a surface code syndrome measurement is performed on a superconducting quantum processing unit. In some implementations, the superconducting quantum processing unit is caused to apply a quantum error correction code including X-type and Z-type stabilizer check patches. Each of the X-type and Z-type stabilizer check patches includes a stabilizer check qubit device and data qubit devices of the superconducting quantum processing unit. Applying the quantum error correction code includes iteratively twirling the data qubit devices in a stabilizer check patch; and evolving the stabilizer check qubit device in the stabilizer check patch and the data qubit devices in the stabilizer check patch under an interaction Hamiltonian. The interaction Hamiltonian includes a plurality of terms interactions between the stabilizer check qubit device in the stabilizer check patch and a respective one of the data qubit devices in the stabilizer check patch.Type: ApplicationFiled: September 11, 2023Publication date: April 4, 2024Applicants: Rigetti & Co, LLC, Goldman Sachs & Co. LLCInventors: Matthew J. Reagor, Thomas C. Bohdanowicz, David Rodriguez Perez, Eyob A. Sete, William J. Zeng
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Publication number: 20230409942Abstract: In a general aspect, two-qubit quantum gate operations are performed in a superconducting quantum processing unit. In some cases, a flux modulation signal is generated. The flux modulation signal is configured to modulate a transition frequency of a first tunable-frequency qubit device in a superconducting quantum processing unit such that a time average of the transition frequency of the first tunable-frequency qubit device over a duration of the flux modulation signal is on resonance with a transition frequency of a second qubit device in the superconducting quantum processing unit. A two-qubit quantum logic gate is applied to a pair of qubits defined by the first tunable-frequency qubit device and the second qubit device. Applying the two-qubit quantum logic gate includes communicating the flux modulation signal to a flux bias control line coupled to the first tunable-frequency qubit device.Type: ApplicationFiled: June 21, 2023Publication date: December 21, 2023Applicant: Rigetti & Co, LLCInventors: Eyob A. Sete, Stefano Poletto, Nicolas Didier
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Publication number: 20230394342Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: ApplicationFiled: January 18, 2023Publication date: December 7, 2023Applicant: Rigetti & Co, LLCInventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
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Patent number: 11677402Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.Type: GrantFiled: August 24, 2021Date of Patent: June 13, 2023Assignee: Rigetti & Co, LLCInventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
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Patent number: 11593698Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: GrantFiled: June 3, 2021Date of Patent: February 28, 2023Assignee: Rigetti & Co, LLCInventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
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Patent number: 11574230Abstract: A quantum computing system that includes a quantum circuit device having at least one operating frequency; a first substrate having a first surface on which the quantum circuit device is disposed; a second substrate having a first surface that defines a recess of the second substrate, the first and second substrates being arranged such that the recess of the second substrate forms an enclosure that houses the quantum circuit device; and an electrically conducting layer that covers at least a portion of the recess of the second substrate.Type: GrantFiled: July 22, 2020Date of Patent: February 7, 2023Assignee: Rigetti & Co, LLCInventors: Chad Tyler Rigetti, Dane Christoffer Thompson, Alexei N. Marchenkov, Mehrnoosh Vahidpour, Eyob A. Sete, Matthew J. Reagor
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Patent number: 11573259Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.Type: GrantFiled: March 16, 2022Date of Patent: February 7, 2023Assignee: Rigetti & Co, LLCInventors: William J. Zeng, Eyob A. Sete, Chad Tyler Rigetti
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Publication number: 20220414517Abstract: In a general aspect, a superconducting quantum processing unit includes a first qubit device, a second qubit device, and a tunable floating coupler device coupled between the first and second qubit devices. Values of a coupling strength of the first and second qubit devices at a plurality of operating points of the tunable floating coupler device are measured. The operating points correspond to respective values of a magnetic flux applied to the tunable floating coupler device. Based on the measured values of the coupling strength, a parking value of the magnetic flux is identified. The parking value of the magnetic flux corresponds to a magnitude of the coupling strength being less than or equal to a threshold value; the threshold value is associated with a target gate fidelity for the superconducting quantum processing unit.Type: ApplicationFiled: September 1, 2022Publication date: December 29, 2022Applicant: Rigetti & Co, LLCInventors: Eyob A. Sete, Stefano Poletto, Riccardo Manenti, Angela Q. Chen, Shobhan Kulshreshtha
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Publication number: 20220231690Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.Type: ApplicationFiled: August 24, 2021Publication date: July 21, 2022Applicant: Rigetti & Co, LLCInventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
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Patent number: 11307242Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.Type: GrantFiled: October 8, 2020Date of Patent: April 19, 2022Assignee: Rigetti & Co, LLCInventors: William J. Zeng, Eyob A. Sete, Chad Tyler Rigetti
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Publication number: 20220092461Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: ApplicationFiled: June 3, 2021Publication date: March 24, 2022Applicant: Rigetti & Co, Inc.Inventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
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Patent number: 11164103Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: GrantFiled: April 6, 2020Date of Patent: November 2, 2021Assignee: Rigetti & Co, Inc.Inventors: Benjamin Jacob Bloom, Shane Arthur Caldwell, Michael James Curtis, Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete, William J. Zeng, Peter Jonathan Karalekas, Nikolas Anton Tezak, Nasser Alidoust
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Patent number: 11108398Abstract: In a general aspect, a quantum logic gate is performed in a quantum computing system. In some cases, a pair of qubits are defined in a quantum processor; the pair of qubits can include a first qubit defined by a first qubit device in the quantum processor and a second qubit defined by a tunable qubit device in the quantum processor. A quantum logic gate can be applied to the pair of qubits by communicating a control signal to a control line coupled to the tunable qubit device. The control signal can be configured to modulate a transition frequency of the tunable qubit device at a modulation frequency, and the modulation frequency can be determined based on a transition frequency of the first qubit device.Type: GrantFiled: October 25, 2019Date of Patent: August 31, 2021Assignee: Rigetti & Co, Inc.Inventors: Eyob A. Sete, Nicolas Didier, Marcus Palmer da Silva, Chad Tyler Rigetti, Matthew J. Reagor, Shane Arthur Caldwell, Nikolas Anton Tezak, Colm Andrew Ryan, Sabrina Sae Byul Hong, Prasahnt Sivarajah, Alexander Papageorge, Deanna Margo Abrams
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Patent number: 11070210Abstract: In a general aspect, a qubit device includes two circuit loops. In some aspects, a first circuit loop includes a first Josephson junction, a second circuit loop includes a second Josephson junction, and the first and second loops are configured to receive a magnetic flux that defines a transition frequency of a qubit device. In some aspects, a quantum integrated circuit includes an inductor connected between a first circuit node and a second circuit node; the first Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node; and the second Josephson junction connected in parallel with the inductor between the first circuit node and the second circuit node.Type: GrantFiled: February 6, 2020Date of Patent: July 20, 2021Assignee: Rigetti & Co, Inc.Inventors: Matthew J. Reagor, Chad Tyler Rigetti, Eyob A. Sete
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Publication number: 20210056454Abstract: In a general aspect, calibration is performed in a quantum computing system. In some cases, domains of a quantum computing system are identified, where the domains include respective domain control subsystems and respective subsets of quantum circuit devices in a quantum processor of the quantum computing system. Sets of measurements are obtained from one of the domains and stored in memory. Device characteristics of the quantum circuit devices of the domain are obtained based on the set of measurements, and the device characteristics are stored in a memory of the control system. Quantum logic control parameters for the subset of quantum circuit devices of the domain are obtained based on the set of measurements and stored in memory.Type: ApplicationFiled: April 6, 2020Publication date: February 25, 2021Applicant: Rigetti & Co, Inc.Inventors: Benjamin Jacob BLOOM, Shane Arthur CALDWELL, Michael James CURTIS, Matthew J. REAGOR, Chad Tyler RIGETTI, Eyob A. SETE, William J. ZENG, Peter Jonathan KARALEKAS, Nikolas Anton TEZAK, Nasser ALIDOUST
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Patent number: 10852346Abstract: In a general aspect, a quantum error-correction technique includes applying a first set of two-qubit gates to qubits in a lattice cell, and applying a second, different set of two-qubit gates to the qubits in the lattice cell. The qubits in the lattice cell include data qubits and ancilla qubits, and the ancilla qubits reside between respective nearest-neighbor pairs of the data qubits. After the first and second sets of two-qubit gates have been applied, measurement outcomes of the ancilla qubits are obtained, and the parity of the measurement outcomes is determined.Type: GrantFiled: May 29, 2019Date of Patent: December 1, 2020Assignee: Rigetti & Co, Inc.Inventors: William J. Zeng, Eyob A. Sete, Chad Tyler Rigetti