Abstract: A method of processing a video transport stream includes receiving a video transport stream and identifying at least one portion of the video transport stream that is not to undergo modification when processed by a rate shaping device. An indicator is inserted into the video transport stream. The indicator is used to signal the statistical multiplexer that the at least one portion of the video transport stream is not to be modified when the video transport stream is processed by the rate shaping device.

Abstract: A method of processing a video transport stream includes receiving a video transport stream and identifying at least one portion of the video transport stream that is not to undergo modification when processed by a rate shaping device. An indicator is inserted into the video transport stream. The indicator is used to signal the statistical multiplexer that the at least one portion of the video transport stream is not to be modified when the video transport stream is processed by the rate shaping device.

Abstract: The system and method of forming a display from a sequence of blocks of pixel data includes intermediate storage of selected blocks of pixel data in sequence for subsequent selective access in the stored sequence. One or more accesses to a given block of pixel data from intermediate storage provides zoom expansion or compression of displayable images represented by the blocks of pixel data.

Abstract: A bus structure for coupling pixel data to control a raster-type display of objects that are represented by the pixel data in storage operates in real time to assemble pixel data for each pixel-count interval from the pixel data in a plurality of memory segments that are connected in cascade. Priority of displayable overlapping images is restored by comparing priority data stored with associated pixel data to transfer from memory and along the bus structure the pixel data for a pixel-count interval that has the highest associated priority data.

Abstract: A phase-lock circuit for controlling an oscillator includes a sampling gate that operates during a gate interval to pass transitions in a comparison signal derived from the oscillator to produce therefrom an oscillator-controlling error signal that is representative of the phase-error direction and magnitude of the substantially symmetrical relationship between occurrence of transitions in the comparison signal within the interval of the gate pulse.