Abstract: A finite-state machine has combinatorial logic connected to a status memory which receives future state signals from the finite-state machine and sends current state signals to the finite-state machine. The combinatorial logic also receives and generates input and output signals which are external to the finite-state machine. The finite-state machine compares the future state signals to at least one reference level to set an error message to reset the finite-state machine for reliable computing and adjustment.

Abstract: The circuit structure comprises a series of storage units, a data bus, an address bus, a line for a reading/writing signal, a precharge logic suitable for precharging the address bus with a precharge address and a precharge sensor suitable for enabling the operation of address decoders of the storage units with a given delay with respect to the end of the precharge. The structure also comprises a flip-flop for controlling the address buses and the precharge logic as well as a delay circuit capable of producing a stop-writing signal with a delay calculated on the basis of the time necessary for the writing of a datum in a storage register of the storage units.

Abstract: A circuit particularly useful in AGC systems, produces an output current which is proportional to the difference between a signal voltage and a reference voltage which is practically independent of temperature. By being a function of a ratio among actual values of integrated resistances and of a ratio among substantially temperature-stable voltages. The effects of temperature dependent value of integrated resistances and of temperature-dependent electrical characteristics of integrated semiconductor devices are compensated in order to produce the desired temperature-independent output current which may usefully be utilized for implementing an automatic gain control.

Abstract: In a dynamic automatic loop for control of the overall gain of an input circuit of a superheterodyne receiver, the response time of the HF-AGC circuit of the TUNER, in response to the action of the TUNER DELAY circuit activated by the IF-AGC in the case of autonomously uncontrollable abrupt increases in the level of the antenna signal from the same HF-AGC of the TUNER, is markedly reduced using an additional TUNER DELAY PLUS circuit able to absorb for a determined interval of time, a discharge current from the storage capacitor the control voltage of the HF-AGC in addition to the discharge current absorbed by the existing TUNER DELAY circuit. The relevant intensity of this additional discharge current and its duration are optimized by way of suitable circuital arrangements in the design of said TUNER DELAY PLUS circuit. The response time is reduced without modifying the time constant of the HF-AGC, which cannot be freely reduced because of inter- and cross-modulation problems.

Abstract: A circuit device for phasing an oscillator, which comprises a multivibrator having a transistor pair with the emitters coupled through a capacitor, comprises a normally open electronic switch controlled by a drive signal to close and inhibit the oscillator. This switch connects a voltage divider to the base of a transistor connected to one of the emitters to interrupt the loop positive feedback of the oscillator upon the voltage across the capacitor reaching a predetermined value.

Abstract: A control circuit for an oscillator comprising a multivibrator with transistors having their emitters connected in common and being supplied corresponding currents on respective legs, comprises a circuit structure adapted to produce on output terminals, on the one side, a current which is proportional to a reference current according to a predetermined parameter, and on the other side, a second current in turn correlated to the reference current as a function of said parameter, thereby to modify the oscillator duty cycle for a given operating frequency.

Abstract: A method of automatically measuring the horizontal scan frequency of a composite synchronism signal, comprising horizontal synchronization impulses at line frequency, consists of first performing a count of a number of impulses having a repeat frequency higher than said line frequency, as intervening between two successive impulses at line frequency.The count value, corresponding to said number of impulses, is stored to obtain the line frequency of the signal, and thereafter, a series of down counts is effected, as initiated at predetermined times, until a change of frequency of the signal is detected.

Abstract: An electronic comparator device with hysteresis, being of a type which comprises a differential cell having a signal input, an output, and a threshold input, further comprises a second differential cell having one input connected to said output and the other input connected to a controlling circuit portion which has an output connected to the threshold input to reduce the threshold voltage value stepwise on the first change-over of the output of the comparator.

Abstract: A method of demodulating multi-standard TV signals consists of providing a plurality of signals at a frequency which is a multiple of a reference frequency whose value is a common submultiple of the frequencies of the multi-standard signals. Thereafter, the signal to be demodulated is multiplied by one of said plural signals having a frequency which differs therefrom by a value equal to the reference frequency; by filtering the result of the multiplication, a signal is obtained at the reference frequency but corresponding in amplitude to the one to be demodulated.

Abstract: A temperature independent, dynamically compressed, DC control voltage is obtained by converting by means of a converter circuit employing a current mirror, a linear variation of the voltage across a control potentiometer, external to the integrated circuit, in a logarithmic differential voltage between two output voltage terminals, respectively on a first and a second branch of the converter circuit, the voltage signal taken from the first branch of the converter circuit being fed to the input of a unitary gain stage biased by a current generator with a temperature coefficient corresponding to the reciprocal of the temperature coefficient of integrated resistances and the corresponding output signal of the unitary gain stage being fed to a first input of a differential stage, to the second input of which is fed the signal taken from the second branch of the converter circuit.

Abstract: A method, and related device, for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator, which has an output for the demodulated signal and a so-called standard selecting input pin, consists of detecting the polarity of the demodulated signal at the output of the demodulator and comparing that polarity with the polarity of the input signal to the demodulator. The voltage value on the standard selecting pin is changed over on detecting a different modulation polarity between the input and output video signals to/from the demodulator to enable the latter to operate to the correct standard at all times.

Abstract: This variable-current source comprises a differential stage and a pair of voltage buffers which respectively receive, at the input, a variable input voltage and a reference voltage and are connected at the output to the differential stage. Both buffers comprise a resistor flown by a current which varies only as a function of the respective input voltage and of its resistance and therefore depends thermally exclusively on this resistance, and provide output voltages which depend upon these currents, so that the output current generated by the differential stage is temperature-independent.

Abstract: During an automatic search scan of a broacasting station of a video receiver's tuner, the AFC signal generated by an existing automatic frequency control circuit of the receiver is applied to an input of four comparators. A first, switched threshold comparator commutes when the AFC signal is greater than the two switched threshold valuesVA'<AFC>VA";and enables a second comparator with a fixed threshold V1 comprised between the two switched threshold values of the first comparator. When the second comparator commutes causes the generation by an output buffer of a signal suitable for arresting the automatic search scan having thus detected on the AFC characteristic the presence of a carrier.

Abstract: A device for minimizing parasitic junction capacitances in an isolated collector vertical PNP transistor, having a terminal N connected to an epitaxial n layer, comprises a bootstrap circuit including an emitter follower vertical PNP transistor having its emitter and base respectively connected to the terminal of the epitaxial n layer and the collector of the isolated collector transistor; further, a bias resistance is connected between the emitter and one pole of a voltage supply to the emitter follower.

Abstract: A method of automatically measuring the horizontal scan frequency of a composite synchronism signal, comprising horizontal synchronization impulses at line frequency, consists of first performing a count of a number of impulses having a repeat frequency higher than said line frequency, as intervening between two successive impulses at line frequency.The count value, corresponding to said number of impulses, is stored to obtain the line frequency of the signal, and thereafter, a series of down counts is effected, as initiated at predetermined times, until a change of frequency of the signal is detected.