Patents by Inventor Faivel S. Pintchovski

Faivel S. Pintchovski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6127257
    Abstract: An improved contact structure and process for forming an improved contact structure for a semiconductor device. A metal (14) is formed on a first metal layer (12) positioned on a substrate (10) The metal (14) is a Group VIIB or Group VIII metal or metal oxide and increases the electrically conductive surface area (25) of the first metal layer (12). In one embodiment, a Group VIIB or Group VIII metal layer is deposited onto the first metal layer and the Group VIIB or Group VIII metal layer is anisotropically etched to form sidewall spacers (24). An insulating layer (16) is deposited overlying the first conductive layer (12) and the sidewall spacers (24). A via opening (18) is formed in the insulation layer (16) to expose a portion of the electrically conductive surface area (25). A second metal layer (22) fills the opening (18) and forms a metallurgical contact to the first metal layer (12).
    Type: Grant
    Filed: November 18, 1993
    Date of Patent: October 3, 2000
    Assignee: Motorola Inc.
    Inventors: Faivel S. Pintchovski, John R. Yeargain, Papu D. Maniar
  • Patent number: 5429989
    Abstract: A process for fabricating a metallization structure includes the formation of an interlayer (20) using an MOCVD deposition process. A metal-organic precursor, having as one component tungsten, is used to deposit the interlayer (20) onto a surface region (18) of a substrate (10) at the bottom of an opening (16). The MOCVD deposition process forms a conformal layer which evenly coats all surfaces of the opening (16). Next, a refractory metal layer (22) is deposited to overlie the interlayer (20). Because of conformal nature of the MOCVD deposition process, refractory metal layer can be formed using corrosive gasses such as tungsten hexafluoride.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: July 4, 1995
    Assignee: Motorola, Inc.
    Inventors: Robert W. Fiordalice, Faivel S. Pintchovski
  • Patent number: 5356833
    Abstract: The present invention includes a process for forming an intermetallic layer over a semiconductor substrate and a device formed by the process. The intermetallic layer includes a material having a molecular formula of AB.sub.3, wherein A is an element having an atomic number of 39-41 or 57-73 and B is an element having an atomic of 45, 46, 77, or 78. In one process, an intermetallic member is formed by forming a patterned layer including the A or B element over a substrate, depositing a layer of the other element, and reacting them. The process forms a self-aligned member. Chemical-mechanical polishing, ion milling, and a lift-off method may be performed to pattern an AB.sub.3 intermetallic layer. In a device, an intermetallic member may act as a gate electrode, an electrode of a capacitor, a conductive spacer, an interconnect, or a contact or via plug. An almost endless number of devices may be formed with the intermetallic members.
    Type: Grant
    Filed: April 5, 1993
    Date of Patent: October 18, 1994
    Assignee: Motorola, Inc.
    Inventors: Papu D. Maniar, Faivel S. Pintchovski
  • Patent number: 5236874
    Abstract: A method is provided for forming a material layer in a semiconductor device using liquid phase deposition. A material layer such as a metal layer, a dielectric layer, a semiconductor layer or a superconducting layer is deposited by the liquid-phase thermal decomposition of a metal-organic precursor dissolved in an anhydrous organic solvent. The organic solvent has a chemical polarity corresponding to the selected metal-organic precursor and has a normal boiling point above the decomposition temperature of the selected precursor. As a result of few restrictions on the range of precursor physical properties, the present invention enables the use of a wide variety of molecular compositions which can be used for the formation of an equally wide variety of material layers. In one embodiment of the invention, a semiconductor substrate is subjected to a liquid mixture comprising a metal-substituted heterocyclic acetylacetonate precursor dissolved in tetradecane (b.p. 254.degree.C.).
    Type: Grant
    Filed: March 8, 1991
    Date of Patent: August 17, 1993
    Assignee: Motorola, Inc.
    Inventor: Faivel S. Pintchovski
  • Patent number: 4756272
    Abstract: A quick-release multiple gas injection pipe connector fitting for removable attachment to a gas reaction chamber having a plurality of gas injection passages. The fitting permits a number of gas inlet lines to be removed from or attached to a reaction chamber fixture in one operation without a separate removal or attachment step for each gas line. The fitting also facilitates a process where the reaction gases are preferably mixed only at the reaction site and not before.
    Type: Grant
    Filed: June 2, 1986
    Date of Patent: July 12, 1988
    Assignee: Motorola, Inc.
    Inventors: Peter H. Kessler, Wilson D. Calvert, Sr., Faivel S. Pintchovski
  • Patent number: 4630669
    Abstract: A heat exchanger apparatus having two sleeves which fit together to seal a sinuous heat exchange fluid channel between them where the channel is open along its length prior to assembly. The sleeves may be made removable to permit easy cleaning of the heat exchange fluid channel. The heat exchange fluid channel may thus be directly cleaned along its entire length in contrast to conventional heat exchangers employing tubes, where the tube interior can be accessed only from the ends. In one embodiment, the channel has a rectangular cross-section to enhance the heat exchange capability of the apparatus.
    Type: Grant
    Filed: August 15, 1985
    Date of Patent: December 23, 1986
    Assignee: Motorola, Inc.
    Inventors: Peter H. Kessler, Wilson D. Calvert, Sr., Faivel S. Pintchovski
  • Patent number: 4619038
    Abstract: A process for selective formation of a titanium silicide, TiSi.sub.2, layer at high temperatures and low pressures via chemical vapor deposition during semiconductor device manufacturing. At 700.degree. to 1000.degree. C. and 0.5 to 1.5 torr, TiSi.sub.2 deposits only on exposed silicon or polysilicon surfaces and not at all on neighboring silicon dioxide. The process provides an excellent means of providing low resistivity interconnects without a mask step or subsequent annealing and removal of unreacted titanium.
    Type: Grant
    Filed: August 15, 1985
    Date of Patent: October 28, 1986
    Assignee: Motorola, Inc.
    Inventor: Faivel S. Pintchovski