Patents by Inventor Fan Huang

Fan Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220044717
    Abstract: A semiconductor structure includes a third metal layer immediately above a second metal layer that is over a first metal layer. The second metal layer includes magnetic tunneling junction (MTJ) devices in a memory region and a first conductive feature in a logic region. Each MTJ device includes a bottom electrode and an MTJ stack over the bottom electrode. The third metal layer includes a first via electrically connecting to the first conductive feature, and a slot via over and electrically connecting to the MTJ stack of the MTJ devices. The slot via occupies space extending continuously and laterally from a first one to a last one of the MTJ devices. The first via is as thin as or thinner than the slot via. The third metal layer further includes second and third conductive features electrically connecting to the first via and the slot via, respectively.
    Type: Application
    Filed: May 17, 2021
    Publication date: February 10, 2022
    Inventors: Chih-Fan Huang, Hsiang-Ku Shen, Liang-Wei Wang, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 11239142
    Abstract: A package structure and method for forming the same are provided. The package structure includes a conductive layer formed over a first substrate, and a dielectric layer formed over the conductive layer. The package structure includes a metal-insulator-metal (MIM) capacitor embedded in the dielectric layer, and a shielding layer formed over the MIM capacitor. The shielding layer is insulated from the MIM capacitor by the dielectric layer. The package structure also includes a first through via formed through the MIM capacitor, and the first through via is connected to the conductive layer, and the first through via is insulated from the shielding layer.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: February 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fan Huang, Hsiang-Ku Shen, Hui-Chi Chen, Tien-I Bao, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 11222857
    Abstract: In some embodiments, the present disclosure relates to a method including forming an interconnect structure over a substrate. A bond pad may be coupled to the interconnect structure, and a polymeric material may be deposited over the bond pad. In some embodiments, the method further includes performing a patterning process to remove a portion of the polymeric material to form an opening in the polymeric material. The opening directly overlies and exposes the bond pad. Further, the method includes a first cleaning process. The polymeric material is cured to form a polymeric protection layer, and a second cleaning process is performed.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: January 11, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Fan Huang, Dian-Hau Chen, Mao-Nan Wang, Tzu-Li Lee, Yen-Ming Chen, Tzung-Luen Li
  • Patent number: 11189538
    Abstract: The present disclosure provides a method that includes providing an integrated circuit (IC) substrate having various devices and an interconnection structure that couples the devices to an integrated circuit; forming a first passivation layer on the IC substrate; forming a redistribution layer on the first passivation layer, the redistribution layer being electrically connected to the interconnection structure; forming a second passivation layer on the redistribution layer and the first passivation layer; forming a polyimide layer on the second passivation layer; patterning the polyimide layer, resulting in a polyimide opening in the polyimide layer; and etching the second passivation layer through the polyimide opening using the polyimide layer as an etch mask.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: November 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fan Huang, Mao-Nan Wang, Kuo-Chin Chang, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20210319265
    Abstract: A method for segmentation of underground drainage pipeline defects based on full convolutional neural network includes steps of: collecting a data set of the underground drainage pipeline defects; processing the data set of the underground drainage pipeline defects; optimizing with a semantic segmentation algorithm; adjusting model hyperparameters; training a model; verifying the model; and testing the model. The method adopts a deep learning algorithm, optimizes the FCN full convolutional neural network, develops a semantic segmentation method suitable for complex and similar defect characteristics of underground drainage pipelines, and adopts real underground drainage pipeline defect detection big data, thereby realizing pixel-level segmentation of the underground drainage pipeline defects and providing better robustness and generality. The detection accuracy and efficiency of the underground drainage pipeline defects are effectively improved.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 14, 2021
    Inventors: Hongyuan Fang, Niannian Wang, Qunfang Hu, Binghan Xue, Xueming Du, Fan Huang
  • Patent number: 11145564
    Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method for integrated circuit (IC) fabrication includes forming a passivation layer over a first contact feature, forming a second contact feature over and through the passivation layer to electrically connect to the first contact feature, and forming a multi-layer passivation structure over the second contact feature and over the passivation layer. Forming the multi-layer passivation structure includes depositing a first nitride layer, an oxide layer over the first nitride layer, and a second nitride layer over the oxide layer.
    Type: Grant
    Filed: April 26, 2019
    Date of Patent: October 12, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Fan Huang, Hui-Chi Chen, Kuo-Chin Chang, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20210265291
    Abstract: In some embodiments, the present disclosure relates to a method including forming an interconnect structure over a substrate. A bond pad may be coupled to the interconnect structure, and a polymeric material may be deposited over the bond pad. In some embodiments, the method further includes performing a patterning process to remove a portion of the polymeric material to form an opening in the polymeric material. The opening directly overlies and exposes the bond pad. Further, the method includes a first cleaning process. The polymeric material is cured to form a polymeric protection layer, and a second cleaning process is performed.
    Type: Application
    Filed: February 24, 2020
    Publication date: August 26, 2021
    Inventors: Chih-Fan Huang, Dian-Hau Chen, Mao-Nan Wang, Tzu-Li Lee, Yen-Ming Chen, Tzung-Luen Li
  • Patent number: 11086408
    Abstract: A keypad is provided in the present invention. The keypad includes a keypad shell and a keypad circuit board provided within the keypad shell. The keypad shell is provided with at least two subscriber identity module (SIM) card sockets and a first communication module connected to the SIM card sockets and configured to access the Internet. A SIM card switch is provided between the first communication module and the SIM card sockets. Compared to the prior art, the present invention enables, by means of providing the keypad with the at least two SIM card sockets and the first communication module supporting all major operators, the keypad to access the Internet when connected to a mobile terminal, and ensures uninterrupted Internet data access by switching to a SIM card of a different operator when the SIM card of the current operator has weak reception.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: August 10, 2021
    Assignee: HuiZhou TCL Mobile Communication Co., Ltd.
    Inventors: Zhuwei Qiu, Bin Luo, Xu Wang, Fan Huang, Xingchun Chen, Shengfang Qiu, Yong Zeng
  • Patent number: 11056474
    Abstract: According to an exemplary embodiment, a semiconductor package is provided. The semiconductor package includes at least one chip, and at least one component adjacent to the at least one chip, wherein the at least one chip and the at least one component are molded in a same molding body.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Tsai-Tsung Tsai, Wei-Hung Lin, Ming-Da Cheng
  • Publication number: 20210202335
    Abstract: Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.
    Type: Application
    Filed: March 15, 2021
    Publication date: July 1, 2021
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng
  • Publication number: 20210191464
    Abstract: An electronic device with an extensible display screen and a control method therefor. The electronic device includes: a mobile terminal (10), a protective sleeve (20), and a keyboard (30) and an auxiliary display screen (40) for communicating with the mobile terminal (10) respectively. The keyboard (30) and the mobile terminal (10) are arranged on the protective sleeve (20). The auxiliary display screen (40) is arranged on the other side opposite to a main display screen of the mobile terminal (10). The front and back sides of the mobile terminal (10) may simultaneously carry out display with provision of the auxiliary display screen (40), and thus the electronic device is applicable to a variety of user scenarios. Additionally, a corresponding display may be selected according to different display content of the mobile terminal (10) so as to obtain a better display effect.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 24, 2021
    Applicant: HuiZhou TCL Mobile Communication Co.,Ltd.
    Inventors: Xingchun CHEN, Bin LUO, Fan HUANG, Yuxiong LEI, Shengfang QIU, Xu WANG, Zhuwei QIU
  • Patent number: 11031458
    Abstract: A metal-insulator-metal (MIM) capacitor structure and a method for forming the same are provided. The MIM capacitor structure includes a substrate, and the substrate includes a capacitor region and a non-capacitor region. The MIM capacitor structure includes a first electrode layer formed over the substrate, and a first spacer formed on a sidewall of the first electrode layer. The MIM capacitor structure includes a first dielectric layer formed on the first spacers, and a second electrode layer formed on the first dielectric layer. The second electrode layer extends from the capacitor region to the non-capacitor region, and the second electrode layer extends beyond an outer sidewall of the first spacer.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: June 8, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chih-Fan Huang, Chih-Yang Pai, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20210167809
    Abstract: The present application discloses a mobile terminal having a shared radio frequency antenna, comprising a PCB; the PCB is provided thereon with a distance sensing module, a radio frequency module, a filtering module for preventing a signal, that is not needed by the operation of the distance sensing module, from passing, and a radio frequency antenna module for generating a resonance frequency that is needed by the operation of the distance sensing module and a resonance frequency that is needed by the operation of the radio frequency module; the distance sensing module is connected to the radio frequency antenna module by means of the filtering module; and the radio frequency antenna module is further connected to the radio frequency module.
    Type: Application
    Filed: August 24, 2018
    Publication date: June 3, 2021
    Applicant: JRD Communication (Shenzhen) LTD.
    Inventors: Jianhua XU, Fan HUANG
  • Publication number: 20210129587
    Abstract: A non-pneumatic tire includes a tread layer and a spoke layer including an inner cylinder and several spoke assemblies. The tread layer is annular and has a maximum outer diameter of the non-pneumatic tire and is adapted to be in contact with a ground. The spoke assemblies extend in a radial direction of the non-pneumatic tire and are arranged around an axial core of the non-pneumatic tire. An end of each spoke assembly is connected to the inner cylinder, and another end thereof is connected to the tread layer. Each spoke assembly includes a straight spoke, a bending spoke, and a connecting rib. Each bending spoke includes a first segment and a second segment, which are not connected in a straight line. Each connecting rib has a first end connected to the straight spoke and a second end opposite to the first end and connected to the bending spoke. When the non-pneumatic tire bears a weight and is squeezed, the spoke assemblies do not get in contact with one another.
    Type: Application
    Filed: August 20, 2020
    Publication date: May 6, 2021
    Applicant: KENDA RUBBER IND. CO., LTD.
    Inventors: CHI-JEN YANG, MIN-FAN HUANG, JIA-YI JIANG
  • Publication number: 20210118829
    Abstract: A chip structure is provided. The chip structure includes a semiconductor substrate. The chip structure includes a first dielectric layer over the semiconductor substrate. The chip structure includes a first conductive layer over the first dielectric layer. The chip structure includes a second dielectric layer over the first conductive layer and the first dielectric layer. The chip structure includes a first conductive via passing through the second dielectric layer, the first conductive layer, and the first dielectric layer and electrically connected to the first conductive layer. The chip structure includes a second conductive via passing through the second dielectric layer and the first dielectric layer. The chip structure includes a first conductive pad over and in direct contact with the first conductive via. The chip structure includes a second conductive pad over and in direct contact with the second conductive via.
    Type: Application
    Filed: October 17, 2019
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fan HUANG, Mao-Nan WANG, Hui-Chi CHEN, Dian-Hau CHEN, Yen-Ming CHEN
  • Publication number: 20210118782
    Abstract: A package structure and method for forming the same are provided. The package structure includes a conductive layer formed over a first substrate, and a dielectric layer formed over the conductive layer. The package structure includes a metal-insulator-metal (MIM) capacitor embedded in the dielectric layer, and a shielding layer formed over the MIM capacitor. The shielding layer is insulated from the MIM capacitor by the dielectric layer. The package structure also includes a first through via formed through the MIM capacitor, and the first through via is connected to the conductive layer, and the first through via is insulated from the shielding layer.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 22, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fan HUANG, Hsiang-Ku SHEN, Hui-Chi CHEN, Tien-I BAO, Dian-Hau CHEN, Yen-Ming CHEN
  • Publication number: 20210098399
    Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.
    Type: Application
    Filed: July 23, 2020
    Publication date: April 1, 2021
    Inventors: Chih-Fan Huang, Hui-Chi Chen, Chih-Sheng Li, Chih-Hung Lu, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20210096654
    Abstract: A keypad is provided in the present invention. The keypad includes a keypad shell and a keypad circuit board provided within the keypad shell. The keypad shell is provided with at least two subscriber identity module (SIM) card sockets and a first communication module connected to the SIM card sockets and configured to access the Internet. A SIM card switch is provided between the first communication module and the SIM card sockets. Compared to the prior art, the present invention enables, by means of providing the keypad with the at least two SIM card sockets and the first communication module supporting all major operators, the keypad to access the Internet when connected to a mobile terminal, and ensures uninterrupted Internet data access by switching to a SIM card of a different operator when the SIM card of the current operator has weak reception.
    Type: Application
    Filed: January 17, 2018
    Publication date: April 1, 2021
    Applicant: HuiZhou TCL Mobile Communication Co., Ltd.
    Inventors: Zhuwei QIU, Bin LUO, Xu WANG, Fan HUANG, Xingchun CHEN, Shengfang QIU, Yong ZENG
  • Publication number: 20210091029
    Abstract: Semiconductor device packages and method are provided. A semiconductor device package according to the present disclosure includes a substrate including a first region, a passive device disposed over the first region of the substrate, a contact pad disposed over the passive device, a passivation layer disposed over the contact pad, a recess through the passivation layer, and an under-bump metallization (UBM) layer. The recess exposes the contact pad and the UBM layer includes an upper portion disposed over the passivation layer and a lower portion disposed over a sidewall of the recess. A projection of the upper portion of the UBM layer along a direction perpendicular to the substrate falls within an area of the contact pad.
    Type: Application
    Filed: December 7, 2020
    Publication date: March 25, 2021
    Inventors: Chih-Fan Huang, Hui-Chi Chen, Kuo-Chin Chang, Chien-Huang Yeh, Hong-Seng Shue, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 10950514
    Abstract: Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: March 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chen-Hua Yu, Chung-Shi Liu, Chih-Fan Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng