Abstract: Systems and methods for measurement of signal power, when the signal is substantially variable or otherwise time varying. A log-linear VGA is coupled in a feedback configuration to a difference-of-squares detector and an integrator. The log-linear VGA includes a set of selectable amplifier cells. A sliding current generator selects one or more amplifier cells, wholly or partially, producing a sum of outputs. Some of the selectable amplifier cells have differential amplification, while others have similar amplification but are differentially attenuated. Switches turn off to isolate amplifier cells when the cell is not selected. Canceling circuits produce an output opposite to unselected amplifier cells, providing a sum near zero. Temperature compensation and other adjustment include two components: when the output y and the input x have the relation y=a+b log x the log-linear VGA can adjust either the offset or slope.

Abstract: Adjusting a voltage-controlled oscillator (VCO) accurately and reliably. The voltage-controlled oscillator VCO attempts to generate an output signal with a programmed known frequency. An ALC circuit and a VCTA circuit adjust the VCO's amplitude and frequency. The system alternates making changes between amplitude or frequency, checking at each change what (difficult-to-predict) effect this has had on the output of the VCO. Each time the VCO switched capacitor array setting is changed, a circuit reviews the VCO output, and determines whether the VCO output should be adjusted in amplitude and frequency. The VCO amplitude and the VCO frequency are adjusted in alternating steps, that is, adjusting the VCO frequency, determining if further adjustments are desired, adjusting the VCO amplitude, determining if further adjustments are desired, and repeating until the VCO coarse adjustment has been sufficiently conducted.

Abstract: An imaging receiver includes a low noise amplifier (LNA) module to receive and amplify the radio-frequency (RF) input signal; one or more switches configured to selectively pass RF input to one or more of the power detector circuits; one or more power detector circuits coupled to the switches to generate output voltages proportional to associated powers at their input ports; one or more reference circuits to provide reference signals to the switches; and one or more integrator circuits to integrate the output voltages of the power detector circuits.

Abstract: An imaging receiver includes a low noise amplifier (LNA) module to receive and amplify the radio-frequency (RF) input signal; one or more switches configured to selectively pass RF input to one or more of the power detector circuits; one or more power detector circuits coupled to the switches to generate output voltages proportional to associated powers at their input ports; one or more reference circuits to provide reference signals to the switches; and one or more integrator circuits to integrate the output voltages of the power detector circuits.

Abstract: A phased array receiver having beam-forming capability, with M inputs and N outputs, includes M radio-frequency (RF) front-ends, each comprising an RF amplifier; and a beam-forming network, with M input ports and N output ports, each coupled to at least one of the other ports through an electrical network, and wherein a signal at each port has a predetermined phase or delay relative to the signals at the other ports, and wherein M is smaller than or equal to N.

Abstract: A polyphase filter having a DC offset cancellation network is disclosed. The polyphase filter includes a first filter section to generate a first set of I- and Q- output signals, a second filter section to generate a second set of I- and Q- output signals, and a DC offset cancellation feedback device to generate four DC offset cancellation signals such that when combined with the input I- and Q- signals, the level of DC offset within the polyphase filter is substantially reduced. Also, a transconductance cell useful for the polyphase filter is disclosed. The transconductance cell includes a first pair of FETs having common gates to receive an input signal and common drains to generate a complementary output signal, a second pair of FETs having common gates to receive a complementary input signal and common drains to generate an output signal, and tail current FET to control the transconductance.

Abstract: A charge pump is disclosed including an output capacitive element to store an output voltage, a charging current source to charge the output capacitive element, a charging switching element to couple a first bias voltage to the charging current source in response to a charging signal, a discharging current source to discharge the output capacitive element, a discharging switching element to couple a second bias voltage to the discharging current source in response to a discharging signal, a unity gain amplifier to generate an amplifier voltage substantially equal to the output voltage, a first switching element to couple the amplifier voltage to the charging current source in response to a leakage prevention signal; and a second switching element to couple the amplifier voltage to the discharging current source in response to the leakage prevention signal.

Abstract: In general, a computing device is configured with a display panel integrated with a plurality of antennas. These antennas may enable service to multiple wireless communication systems such as, for example, a wireless local area network (WLAN), a global positioning system (GPS), a high performance radio local area network (HiperLAN/x) and/or a Bluetooth based network.

Abstract: A system and method to use a wired network to extend radio coverage of a wireless network is described. With respect to one embodiment, the method comprises converting incoming wireless signals sent by a wireless unit to intermediate frequency (IF) signals. The method further comprises transmitting the converted IF signals over a wired network and retrieving the transmitted IF signals from the wired network. In addition, the method comprises converting the retrieved IF signals to digital data that can be routed to a destination.

Abstract: An RF mixer utilizing frequency and bias compensation for improved performance characteristics. The RF mixer receives bias signals that are dependent on V.sub.CC levels to internally balance the local oscillation received and mix the perfectly bias balanced internally generated oscillation signal with the RF input.

Abstract: A method and a circuit for self-calibration and testing QPSK transmitter/receiver IC's is provided. The method and circuit enable variable error parameters such as gain mismatch, offset voltages, and phase errors inherent in the circuit and signals to be measured and taken into account by the digital signal processors for minimum bit error rates during cellular communications.

Abstract: Self-oscillation of a prescalar circuit is avoided by including offset generators on the inputs of the prescalar circuit. This ensures that when the transistors in one differential pair in the prescalar circuit transition from ON to OFF, the other differential pair of transistors will not transition. As a result, spikes are prevented in the differential pair that does not have a transition. A quadrature signal generator constructed with such a prescalar circuit provides an accurate output despite weak or non-existent input signals.

Abstract: A comparator has a simple high frequency signal path from input to output formed by two differentially connected transistors with an output transistor connected to each. A current control circuit maintains a constant total current flowing through the differentially connected transistors. The ratio of currents flowing through the differentially connected transistors is initially set by a control circuit, so that the output of the comparator is predictable when powered up. The control circuit then gradually releases control, so that there is a smooth transfer to control by a reference signal input to the comparator.