Patents by Inventor Fariba Farahanchi

Fariba Farahanchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6980035
    Abstract: A technique and circuit implementation are described for automatically detecting a change in a power supply voltage and selectively reconfiguring a circuit for optimized performance at the changed voltage. One application of particular interest is an auto-detect level shifter. The auto-detect level shifter can be used in an output driver and can be automatically enabled if it is needed to optimize performance for various I/O standards, including those that operate at different voltages.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: December 27, 2005
    Assignee: Xilinx, Inc.
    Inventors: Shi-dong Zhou, Gubo Huang, Shankar Lakkapragada, Andy T. Nguyen, Fariba Farahanchi
  • Patent number: 6549016
    Abstract: A negative voltage detector including a resistor divider circuit is used to translate a negative voltage into a standard CMOS logic low or logic high value. The small area consumed by the negative voltage divider allows multiple device placement within a logic device without the consumption of much area on the logic device. Additionally, the multiple devices placed may detect different negative voltage thresholds with a simple tuning of device components.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: April 15, 2003
    Assignee: Xilinx, Inc.
    Inventors: Derek R. Curd, Fariba Farahanchi
  • Patent number: 6278327
    Abstract: A negative voltage detector is disclosed wherein a resistor divider circuit is used to translate a negative voltage into a standard CMOS logic low or logic high value. The small area consumed by the negative voltage divider of the present invention allows multiple device placement within a logic device without the consumption of much area on the logic device. Additionally, the multiple devices placed may detect different negative voltage thresholds with a simple tuning of device components.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: August 21, 2001
    Assignee: Xilinx, Inc.
    Inventors: Derek R. Curd, Fariba Farahanchi