Patents by Inventor Farid Abooameri
Farid Abooameri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9305748Abstract: Etch rate distributions are captured at a succession of hardware tilt angles of the RF source power applicator relative to the workpiece and their non-uniformities computed, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two plasma reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.Type: GrantFiled: October 28, 2013Date of Patent: April 5, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Gaurav Saraf, Xiawan Yang, Farid Abooameri, Wen Teh Chang, Anisul H. Khan, Bradley Scott Hersch
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Patent number: 9184021Abstract: Etch rate distribution non-uniformities are predicted for a succession of hardware tilt angles of the RF source applicator relative to the workpiece, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.Type: GrantFiled: October 28, 2013Date of Patent: November 10, 2015Assignee: APPLIED MATERIALS, INC.Inventors: Gaurav Saraf, Xiawan Yang, Farid Abooameri, Wen Teh Chang, Anisul H. Khan, Bradley Scott Hersch
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Publication number: 20150096959Abstract: Etch rate distributions are captured at a succession of hardware tilt angles of the RF source power applicator relative to the workpiece and their non-uniformities computed, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two plasma reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.Type: ApplicationFiled: October 28, 2013Publication date: April 9, 2015Applicant: APPLIED MATERIALS, INC.Inventors: Gaurav Saraf, Xiawan Yang, Farid Abooameri, Wen Teh Chang, Anisul H Khan, Bradley Scott Hersch
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Publication number: 20150099314Abstract: Etch rate distribution non-uniformities are predicted for a succession of hardware tilt angles of the RF source applicator relative to the workpiece, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.Type: ApplicationFiled: October 28, 2013Publication date: April 9, 2015Applicant: APPLIED MATERIALS, INC.Inventors: Gaurav Saraf, Xiawan Yang, Farid Abooameri, Wen Teh Chang, Anisul H. Khan, Bradley Scott Hersch
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Patent number: 8475625Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.Type: GrantFiled: May 3, 2006Date of Patent: July 2, 2013Assignee: Applied Materials, Inc.Inventors: Sharma Pamarthy, Huutri Dao, Xiaoping Zhou, Kelly A. McDonough, Jivko Dinev, Farid Abooameri, David E. Gutierrez, Jim Zhongyi He, Robert S. Clark, Dennis M. Koosau, Jeffrey William Dietz, Declan Scanlan, Subhash Deshmukh, John P. Holland, Alexander Paterson
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Publication number: 20100099266Abstract: Embodiments of the invention provide a method and apparatus that enables plasma etching of high aspect ratio features. In one embodiment, a method for etching is provided that includes providing a substrate having a patterned mask disposed on a silicon layer in an etch reactor, providing a gas mixture of the reactor, maintaining a plasma formed from the gas mixture, wherein bias power and RF power provided the reactor are pulsed, and etching the silicon layer in the presence of the plasma.Type: ApplicationFiled: September 21, 2009Publication date: April 22, 2010Applicant: APPLIED MATERIALS, INC.Inventors: Manfred Oswald, Jivko Dinev, Jan Rupf, Markus Meye, Francesco Maletta, Uwe Leucke, Ron Tilger, Farid Abooameri, Alexander Matyushkin, Denis Koosau, Xiaoping Zhou, Thorsten Lehmann, Declan Scanlan
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Publication number: 20070256785Abstract: Embodiments of the invention provide a method and apparatus, such as a processing chamber, suitable for etching high aspect ratio features. Other embodiments include a showerhead assembly for use in the processing chamber. In one embodiment, a processing chamber includes a chamber body having a showerhead assembly and substrate support disposed therein. The showerhead assembly includes at least two fluidly isolated plenums, a region transmissive to an optical metrology signal, and a plurality of gas passages formed through the showerhead assembly fluidly coupling the plenums to the interior volume of the chamber body.Type: ApplicationFiled: May 3, 2006Publication date: November 8, 2007Inventors: Sharma Pamarthy, Huutri Dao, Xiaoping Zhou, Kelly McDonough, Jivko Dinev, Farid Abooameri, David Gutierrez, Jim He, Robert Clark, Dennis Koosau, Jeffrey Dietz, Declan Scanlan, Subhash Deshmukh, John Holland, Alexander Paterson
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Publication number: 20040152331Abstract: The present invention provides a process of etching polysilicon gates using a silicon dioxide hard mask. The process includes exposing a substrate with a polysilicon layer formed thereon to a plasma of a process gas, which includes a base gas and an additive gas. The base gas includes HBr, Cl2, O2, and the additive gas is NF3 and/or N2. By changing a volumetric flow ratio of the additive gas to the base gas, the etch rate selectivity of polysilicon to silicon dioxide may be increased, which allows for a thinner hard mask, better protection of the gate oxide layer, and better endpoint definition and control. Additionally, when the polysilicon layer includes both N-doped and P-doped regions, the additive gas includes both NF3 and N2, and by changing a volumetric flow ratio of NF3 to N2, the etching process may be tailored to provide optimal results in N/P loading and microloading.Type: ApplicationFiled: September 11, 2003Publication date: August 5, 2004Applicant: Applied Materials, Inc.Inventors: Songlin Xu, Thorsten B. Lill, Yeajer Arthur Chen, Mohit Jain, Nicolas Gani, Shing-Li Sung, Jitske K. Kretz, Meihua Shen, Farid Abooameri
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Publication number: 20040018739Abstract: One embodiment of the present invention is a method used to fabricate an integrated circuit device on a wafer or substrate at a stage where a gate oxide is disposed over the wafer or substrate, a polysilicon layer is disposed thereover, a patterned hardmask is disposed thereover, a patterned antireflective coating is disposed thereover, and a patterned photoresist is disposed thereover, the method including steps of: (a) before stripping the photoresist, etching the polysilicon utilizing a first etch chemistry for a first period of time; and (b) etching the polysilicon utilizing a second etch chemistry for a second period of time.Type: ApplicationFiled: July 26, 2002Publication date: January 29, 2004Applicant: Applied Materials, Inc.Inventors: Farid Abooameri, Shashank C. Deshmukh, Meihua Shen, Stephanie S. Cheng, Nicolas Gani, Thorsten B. Lill
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Publication number: 20020075631Abstract: The present invention provides a capacitor having upper and lower electrodes formed of iridium or iridium oxide or combinations thereof. The electrodes are preferably formed using physical vapor deposition. An insulating layer disposed between the electrodes can be a ferroelectric ceramic such as PZT or PLZT.Type: ApplicationFiled: December 27, 2000Publication date: June 20, 2002Applicant: Applied Materials, Inc.Inventors: Kaushal Kishore Singh, Farid Abooameri, Visweswaren Sivaramakrishnan, Talex Sajoto, Vicente Lim, Jun Zhao