Patents by Inventor Fei (Fred) Wang

Fei (Fred) Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10884023
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: January 5, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang
  • Publication number: 20200256890
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang
  • Patent number: 10670626
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: June 2, 2020
    Assignee: Keysight Technologies, Inc.
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang
  • Publication number: 20190187175
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Application
    Filed: December 15, 2017
    Publication date: June 20, 2019
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang
  • Patent number: 10177647
    Abstract: A direct current controller includes a rectifier configured to convert alternating current input into a direct current output. A converter electrically coupled to the rectifier generates a converted direct current voltage that regulates a converted direct current from the direct current output of the rectifier and synthesizes an ac component of an alternating current grid to counteract an induced back-emf. A direct current controller central controller coupled to the converter regulates the converted direct current.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: January 8, 2019
    Assignee: UT-BATTELLE, LLC
    Inventors: Fei (Fred) Wang, Burak Ozpineci, Sheng Zheng, Steven L. Campbell, Madhu Sudhan Chinthavali, Aleksandar D. Dimitrovski, Philip R. Irminger, Omer C. Onar, Larry E. Seiber, Leon M. Tolbert, Clifford P. White, Daniel J. Costinett, Zhi Li, Jingxin Wang, Fei Yang
  • Publication number: 20170077799
    Abstract: A direct current controller includes a rectifier configured to convert alternating current input into a direct current output. A converter electrically coupled to the rectifier generates a converted direct current voltage that regulates a converted direct current from the direct current output of the rectifier and synthesizes an ac component of an alternating current grid to counteract an induced back-emf. A direct current controller central controller coupled to the converter regulates the converted direct current.
    Type: Application
    Filed: September 9, 2016
    Publication date: March 16, 2017
    Inventors: Fei (Fred) Wang, Burak Ozpineci, Sheng Zheng, Steven L. Campbell, Madhu Sudhan Chinthavali, Aleksandar D. Dimitrovski, Philip R. Irminger, Omer C. Onar, Larry E. Seiber, Leon M. Tolbert, Clifford P. White, Daniel J. Costinett, Zhi Li, Jingxin Wang, Fei Yang
  • Patent number: 6337804
    Abstract: A multilevel voltage source inverter and related control scheme in which a VSI controller operates in a low frequency mode of operation below a threshold operating frequency to more evenly distribute the duty cycle and thermal loss of the VSI switches. The technique makes use of multiple alternative switching states which achieve the same output voltage.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: January 8, 2002
    Assignee: General Electric Company
    Inventors: Eugene F. Kea, Fei (Fred) Wang, James M. Nowak, David Smith
  • Patent number: 6058031
    Abstract: A high power motor drive converter includes: a five level hybrid NPC output power conversion stage including three NPC phase bridges having switches and coupled in a wye configuration through a converter neutral point, each NPC phase bridge receiving power on a respective direct current bus; three isolated split series-connected DC capacitor banks each coupled in parallel to a respective one of the three NPC phase bridges; and a controller for selecting switch positions with active control of neutral voltages. The controller is adapted to select switch positions using feedforward sine-triangle modulation with third harmonic injection, zero sequence injection, and/or discontinuous modulation injection.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: May 2, 2000
    Assignee: General Electric Company
    Inventors: James Patrick Lyons, Vlatko Vlatkovic, Paul Martin Espelage, Albert Andreas Maria Esser, Yifan Zhao, Fei Fred Wang, Sr.